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SPI Issues

timothy
Associate II
Posted on July 21, 2013 at 07:37

Currently im using SPI to send information to configure the internal registers of a ENC28J The minimum SCK allowed is 8 Mhz. Im using the STM32F103RB, which can operate at 78Mhz. For some reason when i try to boost the speed of the SPI to 8 Mhz the signal and data become distorted. Below is a clip from my clock, maybe i made a mistake somewhere. Any help is welcomed.

// 1. Clocking the controller from internal HSI RC (8 MHz)
RCC_HSICmd(ENABLE);
// wait until the HSI is ready
while(RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);
// 2. Enable ext. high frequency OSC
RCC_HSEConfig(RCC_HSE_ON);
// wait until the HSE is ready
while(RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET);
// 3. Init PLL
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9); // 72MHz
RCC_PLLCmd(ENABLE);
// wait until the PLL is ready
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
// 4. Set system clock dividers
/* Select PLL as system clock source */
#ifdef EMB_FLASH
// 5. Init Embedded Flash
// Zero wait state, if 0 < HCLK 24 MHz
// One wait state, if 24 MHz < HCLK 56 MHz
// Two wait states, if 56 MHz < HCLK 72 MHz
// Flash wait state
FLASH_SetLatency(FLASH_Latency_2);
// Half cycle access
FLASH_HalfCycleAccessCmd(FLASH_HalfCycleAccess_Disable);
// Prefetch buffer
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
#endif // EMB_FLASH
// 5. Clock system from PLL
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

#spi #enc28j60 #stm32f103rb
1 REPLY 1
Posted on July 21, 2013 at 13:30

I'd probably wait the for correct clock to be selected after RCC_SYSCLKConfig() but I'm not sure that relates to SPI. Perhaps you can be more specific about how you're setting that up, and what the signal looks like. Can you output and verify the internal clocks using the MCO pin?

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