FIX: Enable pull-down resistor in SCK pinInit parameters:CPOL=0 CPHA =0, so SCK level should be idling at LOW level.Software NSSHalf-Duplex, master modeSoftware: CubeIDE 1.9, CubeMX 6.5.0Device: STM32F411CEIssue:Regardless of the clock config, SCK is high if the SPI module is disabled.When enabling CS before calling HAL_SPI_Transmit/Receive, the slave sees SCK high, breaking the transfer.After a Transmit, the SPI module is left enabled, holding SCK low, so next transfer will work.After a Receive, SPI module is disabled, breaking SCK again.The issue can be seen here:

Senior II

Solved

[SOLVED] SCK idling high when SPI module is stopped

FIX: Enable pull-down resistor in SCK pin

Init parameters:

Software: CubeIDE 1.9, CubeMX 6.5.0

Device: STM32F411CE

Issue:

Regardless of the clock config, SCK is high if the SPI module is disabled.
When enabling CS before calling HAL_SPI_Transmit/Receive, the slave sees SCK high, breaking the transfer.
After a Transmit, the SPI module is left enabled, holding SCK low, so next transfer will work.
After a Receive, SPI module is disabled, breaking SCK again.

The issue can be seen here:

This topic has been closed for replies.

Best answer by waclawek.jan

When you disable SPI (by clearing SPE bit), SCK is threestated. If it goes up, it's because there is a pullup, internal or external.

If you don't like Cube/HAL's behaviour, simply don't use it. SPI is simple enough to be used normally.

JW

Super User

When you disable SPI (by clearing SPE bit), SCK is threestated. If it goes up, it's because there is a pullup, internal or external.

If you don't like Cube/HAL's behaviour, simply don't use it. SPI is simple enough to be used normally.

JW

Senior II

Enabling the pulldown resistor fixed the clock idle issue, Thanks!