Shift register doesn't transfer to DR register in SPI bus read

[Larry Shilkoff]

Posted on December 08, 2016 at 23:47

I'm attemping to read the data from a 8 bit SPI bus transfer. It seems the data is getting into the shift register, but not transferring into the DR register after clocking the data. I have confirmed the RXNE and OVR flags are clear by reading the DR register prior to clocking data in. After the data is clocked into the SPI port, the RXNE flag is confirmed set, with only 0x00000000 indicated in the DR register (0x00000045 was expected). Everything seems to be set up correctly. Any thoughts on anything I may have missed?

I've attached my initialization settings for the GPIO and SPI busses, the called routine for reading the bus, and a scope photo showing the clock and data. I'm reading from external memory, so the photo shows the first 16 clocks as the address for the byte data and the remaining 8 clocks as the data from the external memory. The top trace is data out of the STM32F105RC, center trace is SCLK, and the bottom trace is data into the STM32F105RC.

[Seb]

Posted on December 10, 2016 at 18:02

Assuming the STM32 is used as SPI Master, is it used as 3 wire or 4 wire mode?

In any case, it is good to start from the generic 4 wire mode. (MISO and MOSI shorted outside and MISO should be turned as input when the STM32 reads data from slave)

The slave and STM32 MISO pins should match in 4 wire mode.

Make sure the alternate function is activated on the corresponding GPIO (otherwise the signal won't reach the SPI cell)

Another thing: When debugging, if showing the data on watch window, the debugger will do read of the DR, for example when stopping on a breakpoint. Make sure to save the SW read DR value in a global variable (to view it) and put a breakpoint just after this.

Hope this helps