2011-07-05 02:43 PM
Hi All,
I do not understand
the process of
frequency selection
HSE
in the following lines
:
# if defined (STM32F10X_LD_VL
) | |
(defined
STM32F10X_MD_VL
)
/ *
#Define
SYSCLK_FREQ_HSE
HSE_Value
* /
#define
SYSCLK_FREQ_24MHz
24000000
#else
I understand after reset, HSI clock source is selected but#Define
SYSCLK_FREQ_HSE
HSE_Value
> will select external 8MHz crystal and#define
SYSCLK_FREQ_24MHz
24000000
> will select wich system clock source HSI or HSE ? Thank for help. RomainTo give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2011-07-05 10:22 PM
No.
The 24 MHz value is what SYSCLK will be out of the PLL (3x). SYSCLK_FREQ = 24MHz Or if you want it directly from the external sourceSYSCLK_FREQ = HSE
You would normally define the HSE frequency used in your system using the -DHSE_Value on the compiler command line or as a ''#define HSE_Value'' in stm32f10x_conf.h2011-07-06 03:52 AM
Hi,
Ok, 24MHz is SYSCLK out of PLL but from witch source ? For my project, i need to use HSE 8MHz external crystal througt PLL with 3x to obtain SYSCLK = 24MHz How should i do with system_stm32f10x.c functions ? ThanksTo give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2011-07-06 05:54 AM
Ok, resolved.
In function static void SetSysClockTo24(void). The source is HSE and PLL configuration: = (HSE / 2) * 6 = 24 MHzTo give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2011-07-06 06:50 AM
In function static void SetSysClockTo24(void).
The source is HSE and PLL configuration: = (HSE / 2) * 6 = 24 MHz
Yes, all the settings would be made in STM32F10x_StdPeriph_Lib_V3.5.0\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c I don't know if they've improved the code, but in many cases it didn't take into consideration the HSE_Value for the oscillator, and assumed it was always 8 MHz. SystemCoreClockUpdate() seemed to be a more agnostic routine, as it determined the current system state and considered the frequencies. If your system has specific requirements, (using HSI to get to 24 MHz) it might make sense to re-code or tailor the routines. I've always prefered general solutions to these kinds of things, using a couple of system wide defines, and computing PLL settings dynamically rather than hard coding specific settings for multipliers/dividers.