SDHC and SDXC ?

[antonius]

Posted on April 20, 2014 at 05:22

Guys,

I tried to read SDHC 8Gb with SDIO and it works fine, but when I change into 64Gb SDXC, it doesn't work ? Do you have any ideas what the cause is ? When I tried with SPI and Atmega controller and SPI , they're all working properly. Thanks

[francescatodiego]

Posted on April 21, 2014 at 08:34

Read card CSD register after powerup

TRANS_SPEED field define the max read speed R2W_FACTOR field define the max write speed

[antonius]

Posted on April 21, 2014 at 08:36

It's stable for 8Gb and 64Gb on

#define SDIO_TRANSFER_CLK_DIV            ((uint8_t)0x5) Thanks for the ideas

[antonius]

Posted on April 21, 2014 at 08:42

which one is it ?

/** 

* @brief Card Specific Data: CSD Register 

*/

typedef
struct

{

__IO uint8_t CSDStruct; 
/*!< CSD structure */

__IO uint8_t SysSpecVersion; 
/*!< System specification version */

__IO uint8_t Reserved1; 
/*!< Reserved */

__IO uint8_t TAAC; 
/*!< Data read access-time 1 */

__IO uint8_t NSAC; 
/*!< Data read access-time 2 in CLK cycles */

__IO uint8_t MaxBusClkFrec; 
/*!< Max. bus clock frequency */

__IO uint16_t CardComdClasses; 
/*!< Card command classes */

__IO uint8_t RdBlockLen; 
/*!< Max. read data block length */

__IO uint8_t PartBlockRead; 
/*!< Partial blocks for read allowed */

__IO uint8_t WrBlockMisalign; 
/*!< Write block misalignment */

__IO uint8_t RdBlockMisalign; 
/*!< Read block misalignment */

__IO uint8_t DSRImpl; 
/*!< DSR implemented */

__IO uint8_t Reserved2; 
/*!< Reserved */

__IO uint32_t DeviceSize; 
/*!< Device Size */

__IO uint8_t MaxRdCurrentVDDMin; 
/*!< Max. read current @ VDD min */

__IO uint8_t MaxRdCurrentVDDMax; 
/*!< Max. read current @ VDD max */

__IO uint8_t MaxWrCurrentVDDMin; 
/*!< Max. write current @ VDD min */

__IO uint8_t MaxWrCurrentVDDMax; 
/*!< Max. write current @ VDD max */

__IO uint8_t DeviceSizeMul; 
/*!< Device size multiplier */

__IO uint8_t EraseGrSize; 
/*!< Erase group size */

__IO uint8_t EraseGrMul; 
/*!< Erase group size multiplier */

__IO uint8_t WrProtectGrSize; 
/*!< Write protect group size */

__IO uint8_t WrProtectGrEnable; 
/*!< Write protect group enable */

__IO uint8_t ManDeflECC; 
/*!< Manufacturer default ECC */

__IO uint8_t WrSpeedFact; 
/*!< Write speed factor */

__IO uint8_t MaxWrBlockLen; 
/*!< Max. write data block length */

__IO uint8_t WriteBlockPaPartial; 
/*!< Partial blocks for write allowed */

__IO uint8_t Reserved3; 
/*!< Reserded */

__IO uint8_t ContentProtectAppli; 
/*!< Content protection application */

__IO uint8_t FileFormatGrouop; 
/*!< File format group */

__IO uint8_t CopyFlag; 
/*!< Copy flag (OTP) */

__IO uint8_t PermWrProtect; 
/*!< Permanent write protection */

__IO uint8_t TempWrProtect; 
/*!< Temporary write protection */

__IO uint8_t FileFormat; 
/*!< File Format */

__IO uint8_t ECC; 
/*!< ECC code */

__IO uint8_t CSD_CRC; 
/*!< CSD CRC */

__IO uint8_t Reserved4; 
/*!< always 1*/

} SD_CSD;

[antonius]

Posted on April 21, 2014 at 08:58

I got value of 50 for

sprintf(card_info,''%.2d'',cardinfo->SD_csd.MaxBusClkFrec); printf(''Card info: '');printf(card_info);printf(''\n''); result : Card info: 50 is it 50MHz maximum for MaxBusClkFreq on this SDcard ? thanks

[francescatodiego]

Posted on April 21, 2014 at 09:38

From SD docs Physical Layer Simplified Specification Version 4.10 pag. 116

[Tesla DeLorean]

Posted on April 21, 2014 at 17:46

Yeah, I'm not convinced that a card hung off 200mm (20cm) of wire, and poor grounding is going to approach maximal rates, especially in 4-bit mode.

The mechanics of the F2/F4 SDIO implementations tend to be limited to around 24 MHz unless you play games. Most MicroSD cards are rated for 50 MHz operation, full size MMC/SD perhaps half that, but there are a wide spectrum of cards available.What brand/model/rating SDXC cards are you using?

[Tesla DeLorean]

Posted on April 21, 2014 at 17:52

50 dec = 0x32 hex, so 25 MHz

From 72 MHz a divisor of 3 would get you to 24 MHz, which would be a setting of 1 for SDIO_TRANSFER_CLK_DIV.A more practical approach to validating an SDIO interface would be to CRC32 or hash file data and confirming that matches on a PC and STM32 platform, and that it works repeatedly.

[antonius]

Posted on April 22, 2014 at 02:07

Yeah it's stable now with 64 Gb,

#define SDIO_TRANSFER_CLK_DIV            ((uint8_t)0x3) I'm using several brand for SDcard 8 Gb SDHC = Sand disk 64Gb SDXC = Transcend 1Gb SDHC = No brand...