2016-10-12 03:45 AM
Hello,
I am using STM32F030x. I am trying to read the data from the UART using DMA (channel 2 -> Tx and channel 3-> Rx ). I used CubeMx to generate the initial code and configuration. The DMA is configured in NORMAL mode. I use HAL_UART_Receive_DMA() to start and receive the data on the UART.Now, I have to collect the data into another memory location after a certain time while the initial transfer is not complete. To do this I stop the DMA using HAL_UART_DMAStop() and re-enable the new transmission using HAL_UART_Receive_DMA() . The problem I am facing is that between this HAL_UART_DMAStop and HAL_UART_Receive_DMA, the chip is taking too much time and I am loosing data which is coming on the UART.I would like to know if there is another way to reconfigure the DMA memory register and Size without stopping the DMA or in the fastest way possible. #stm32 #dma2016-10-12 04:50 AM
Hi ,
The recommendations in the application note would be hlpful for you:''
4.1 Software sequence to disable DMA
To switch off a peripheral connected to a DMA stream request, it is mandatory to:1. switch off the DMA stream to which the peripheral is connected,2. wait until the EN bit in DMA_SxCR register is reset (“0�).Only then can the peripheral be safely disabled. DMA request enable bit in the peripheralcontrol register should be reset (''0'') to guarantee that any pending request from peripheralside is cleared.Note: In both cases, a Transfer Complete Interrupt Flag (TCIF in DMA_LISR or DMA_HISR) is setto indicate the end of transfer due to the stream disable.
4.2 DMA flag management before enabling a new transfer
Before enabling a new transfer, the user must ensure that the Transfer Complete InterruptFlag (TCIF) in DMA_LISR or DMA_HISR is cleared.As a general recommendation, it is advised to clear all flags in the DMA_LIFCR andDMA_HIFCR registers before starting a new transfer.
4.3 Software sequence to enable DMA
The following software sequence applies when enabling DMA:1. Configure the suitable DMA stream.2. Enable the DMA stream used (set the EN bit in the DMA_SxCR register).3. Enable the peripheral used. DMA request enable bit in the peripheral control registershould be set (''1'').
Note: If the user enables the used peripheral before the corresponding DMA stream, a “FEIF�(FIFO Error Interrupt Flag) may be set due to the fact the DMA is not ready to provide the first required data to the peripheral (in case of memory-to-peripheral transfer).
''
-Hannibal-
2016-10-13 08:11 AM
Thank you very much for your reply and information.
I managed to reconfigure using :__HAL_DMA_DISABLE(huart1.hdmarx);
while
((huart1.hdmarx->Instance->CCR & DMA_CCR_EN) != 0);
huart1.hdmarx->Instance->CMAR = <New Address>
huart1.hdmarx->Instance->CNDTR = <New size>
__HAL_DMA_ENABLE(huart1.hdmarx);