2018-09-21 02:18 AM
In my own system, a SRAM is interfaced to FSMC of STM32F407 asychrously.
My settings are as follows:
HSE clock: 25MHz
Coreclock: 168MHz
AHC clock: 168MHz for FSMC
Address setup: 1
Address hold: 1
Data setup: 1
Bus turn: 0
And my IDE is TrueStudio.
In above configuraion, FSMC_NE1 is 440ns long at single time read from or write to the SRAM.
Is it right that the shortest FSMC NE's length is 440ns? According to manual, I think it must be much shorter, e.g. possibly under 100ns.
I wonder what the minimum length of FSMC_NE1 is possibly. And could you share configuration for the minimum length?
Best Regards,
Ernest
2018-09-21 02:27 AM
I'd start by confirming the internal clocking by exporting and measuring a clock on PA8 (MCO)