Question
PLL Settings
Posted on October 23, 2015 at 14:43
Hi, is there any difference how exactly I'm getting the desired clock speed on SYSCLK through PLL? For example, let's say I want to have 48MHz on SYSCLK on STM32F407, using a 8 MHz HSE and the PLL. One way of doing it would be this:
HSE = 8MHzM = 8N = 384
P = 8
Q = 8
--------
SYSCLK = 48MHz Another way of doing it would this:
HSE = 8MHz
M = 4
N = 96
P = 4
Q = 4
--------
SYSCLK = 48MHz So my question is: is one of these two ways better than the other (i.e. lower jitter, or lower power consumption), and why? Thank you.
