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Please give some help on L1 cache and MPU

Mr_M_from_G
Senior II

Hello,

I am working with STM32H7, Nucleo board and Atollic TrueStudio.

I have a test routine processing an array of data that is in flash, test routine is also in flash. Around it I set and clear a portbit and measure execution time.

Now I wanted to speed it up by using cache. I read that flash has two waitstates without using cache and this can be improved to virtually 0 waitstates with using cache. So I expected 1/3 of the execution time. But I got only 10% less. I just included SCB_EnableICache ();

Further reading tought me that MPU can define memory regions as cachable, but

  • it is not clear, what is the default cachability with MPU disabled
  • Atollic Debugger gives me a view on MPU registers and it says MPU_CTRL is RO so I can't start MPU at all

Did I miss something?

What options do I have to improve performance?

Any help and hints are welcome

Thanks a lot

Martin

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