Peculiar behaviour of SPI MOSI line on STM32F3xx. MOSI line remain up after transmission

filartrix · ‎2014-01-17

Posted on January 17, 2014 at 11:58

Hi all,

I'm tryng to use SPI in half-duplex mode on STM32F303VC microcontroller. The STM32 act as Master. MOSI line is used as data line for input and output. In my setup I have to send an address register using MOSI line and then read data trough the same line (peripheral is in half duplex) the problem is that after sending one byte, the MOSI line remains at high logical level.. This is not an issue when I need to send multiple data, as shown in figure transmission is fine. The problem is that when I switch to read mode

SPI_BiDirectionalLineConfig(SPI2, SPI_Direction_Rx);

the MOSI line is still up and corrupt the data (second figure)

#spi-stm32

chen · ‎2014-01-17

Posted on January 17, 2014 at 12:36

Hi

''MOSI line is used as data line for input and output.''

''I have to send an address register using MOSI line and then read data trough the same line (peripheral is in half duplex) ''

How is this suppose to work?

MOSI - Master Output, Slave Input (output from master)

MISO : Master Input, Slave Output (output from slave).

filartrix · ‎2014-01-17

Posted on January 17, 2014 at 12:48

Hi,

it is feasible since the peripheral is configured in Half Duplex mode, as described in reference manual page 723:

http://www.st.com/web/en/resource/technical/document/reference_manual/DM00043574.pdf

Filippo

chen · ‎2014-01-17

Posted on January 17, 2014 at 13:21

Hi

So you are referring to this :

''Communication using DMA (direct memory addressing)''

''When the SPI is used only to transmit data, it

is possible to enable only the SPI Tx DMA

channel. In this case, the OVR flag is set be

cause the data received

is not read. When the

SPI is used only to receive data, it is po

ssible to enable only the SPI Rx DMA channel''

I am not sure that it means that only MOSI is active.

I read it to mean that the DMA will only respond to output start

or input end.

I think that MOSI and MISO will both still work.

filartrix · ‎2014-01-17

Posted on January 17, 2014 at 13:30

Hi,

actually I'm not using DMA, nor interrupt to read / write data from SPI.

I'm referring to:

Half-duplex communication

The SPI can communicate in half-duplex mode by setting the BIDIMODE bit in the

SPIx_CR1 register. In this configuration, one single cross connection line is used to link the shift registers of the master and slave together. During this communication, the data is synchronously shifted between the shift registers on the SCK clock edge in the transfer direction selected reciprocally by both master and slave with the BDIOE bit in their SPIx_CR1 registers. In this configuration, the master’s MISO pin and the slave’s MOSI pin are free for other application uses and act as GPIOs.

in this mode one line can be used to send and receive data

Filippo

chen · ‎2014-01-17

Posted on January 17, 2014 at 13:45

OK. How does the slave know data direction?

filartrix · ‎2014-01-17

Posted on January 17, 2014 at 16:41

The slave in this case works pretty much like a I2C periperal.

I send the registry address, then the preipheral responds with the data.

But the problem is another, the SPI data line remains HIGH after the 8 bit transmission.

(the first image refers to transmission only)

Filippo

chen · ‎2014-01-17

Posted on January 17, 2014 at 16:54

Hi

''The slave in this case works pretty much like a I2C periperal.''

In I2C the data direction is determined by a read/write bit in the

address byte, hence address can only be 7 bits in I2C.

''I send the registry address, then the preipheral responds with the data.''

Does that mean, at least in this application, the SPI device is a read only device?

filartrix · ‎2014-01-22

Posted on January 22, 2014 at 15:57

Hi, I finnally come out with a workaround:

after sending the 8 bit address to avoid that data line remains high is necessary to reset the SPI peripheral.

Filippo