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OCTOSPI as Single-SPI

JoseFdez
Associate

Hi everybody,

I'm trying to configure the OCTOSPI1 bus as Single-SPI to read the status register of an external memory (MRAM).

What I expect to see on the scope

0693W00000JP5s9QAD.pngWhat I really see:

  1. The MCU sends the comand (0x05) on the SI line, generates 8 clock cycles and pulls down the /CS line.
  2. IO1 is always 1.

Please, find below more details about the setup and code (ask me for more detais if needed):

My system

  • MCU: STM32H7B3I
  • OCTOSPI1
    • Input frequency: 129 MHz
    • Prescaler = 4 to meet max frequency constraints of the memory (40 MHz).
    • Configured as Single-SPI mode 0.

0693W00000JP5ogQAD.pngMemory

  • Size: 512 KB
  • Max. operating frequency: 40 MHz.
  • Mode 0 and mode 3 support.
  • Pinout

0693W00000JP5pKQAT.pngPhysical connections

  • OCTOSPI1.SIO0 -> SI
  • OCTOSPI1.SIO1 -> SO
  • OCTOSPI1.CS -> /CS
  • OCTOSPI1.CLK -> SCK
  • The /HOLD and /WP pins are at high level, so disabled.

OCTOSPI Init

static void MX_OCTOSPI1_Init(void)
{
  OSPIM_CfgTypeDef sOspiManagerCfg = {0};
  hospi1.Instance = OCTOSPI1;
  hospi1.Init.FifoThreshold = 1;
  hospi1.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE;
  hospi1.Init.MemoryType = HAL_OSPI_MEMTYPE_MICRON;
  hospi1.Init.DeviceSize = 19; // 512 KB
  hospi1.Init.ChipSelectHighTime = 1;
  hospi1.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE;
  hospi1.Init.ClockMode = HAL_OSPI_CLOCK_MODE_0;
  hospi1.Init.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED;
  hospi1.Init.ClockPrescaler = 4; // 129/(4+1) = 25,8 MHz < 40 MHz
  hospi1.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE;
  hospi1.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_DISABLE;
  hospi1.Init.ChipSelectBoundary = 1;
  hospi1.Init.ClkChipSelectHighTime = 0;
  hospi1.Init.DelayBlockBypass = HAL_OSPI_DELAY_BLOCK_BYPASSED;
  hospi1.Init.MaxTran = 0;
  hospi1.Init.Refresh = 0;
  if (HAL_OSPI_Init(&hospi1) != HAL_OK)
  {
    Error_Handler();
  }
  sOspiManagerCfg.ClkPort = 1;
  sOspiManagerCfg.NCSPort = 1;
  sOspiManagerCfg.IOLowPort = HAL_OSPIM_IOPORT_1_LOW;
  if (HAL_OSPIM_Config(&hospi1, &sOspiManagerCfg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
  {
    Error_Handler();
  }
}
void HAL_OSPI_MspInit(OSPI_HandleTypeDef* hospi)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
  if(hospi->Instance==OCTOSPI1)
  {
  
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_OSPI;
    PeriphClkInitStruct.PLL2.PLL2M = 32;
    PeriphClkInitStruct.PLL2.PLL2N = 129;
    PeriphClkInitStruct.PLL2.PLL2P = 2;
    PeriphClkInitStruct.PLL2.PLL2Q = 2;
    PeriphClkInitStruct.PLL2.PLL2R = 2;
    PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_1;
    PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
    PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
    PeriphClkInitStruct.OspiClockSelection = RCC_OSPICLKSOURCE_PLL2;
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
    {
      Error_Handler();
    }
 
    /* Peripheral clock enable */
    __HAL_RCC_OCTOSPIM_CLK_ENABLE();
    __HAL_RCC_OSPI1_CLK_ENABLE();
 
    __HAL_RCC_GPIOG_CLK_ENABLE();
    __HAL_RCC_GPIOF_CLK_ENABLE();
    __HAL_RCC_GPIOB_CLK_ENABLE();
    /**OCTOSPI1 GPIO Configuration
    PG6     ------> OCTOSPIM_P1_NCS
    PF9     ------> OCTOSPIM_P1_IO1
    PB1     ------> OCTOSPIM_P1_IO0
    PF10     ------> OCTOSPIM_P1_CLK
    */
    GPIO_InitStruct.Pin = GPIO_PIN_6;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF10_OCTOSPIM_P1;
    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF10_OCTOSPIM_P1;
    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 
    GPIO_InitStruct.Pin = GPIO_PIN_1;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF11_OCTOSPIM_P1;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
    GPIO_InitStruct.Pin = GPIO_PIN_10;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF9_OCTOSPIM_P1;
    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 
    /* OCTOSPI1 interrupt Init */
    HAL_NVIC_SetPriority(OCTOSPI1_IRQn, 0, 0);
    HAL_NVIC_EnableIRQ(OCTOSPI1_IRQn);
  }
}

Read Status register (the code is executed without errors but reads a sr = 0xFF).

OSPI_RegularCmdTypeDef  cmd = {
	    .OperationType      = HAL_OSPI_OPTYPE_COMMON_CFG,
	    .FlashId            = HAL_OSPI_FLASH_ID_1,
	    /// Instruction phase
	    .Instruction        = CMD_RDSR,
	    .InstructionMode    = HAL_OSPI_INSTRUCTION_1_LINE, // 1-bit at a time
	    .InstructionSize    = HAL_OSPI_INSTRUCTION_8_BITS,
	    .InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE, // Double transfer rate
 
	    // Address phase
	    .AddressMode        = HAL_OSPI_ADDRESS_NONE, ///< None => Phase is skipped
 
	    // Alternate-bytes phase
	    .AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE, ///< None => Phase is skipped
 
	    // Dummy-cycle phase
	    .DummyCycles        = 0, /// 0 => skipped
 
	    // Data phase
	    .DataMode   	      = HAL_OSPI_DATA_1_LINE, // 1 bit at a time
	    .NbData     	      = 1, // Number of bytes to read/write
	    .DataDtrMode		    = HAL_OSPI_DATA_DTR_DISABLE, // Double transfer rate
 
	    .DQSMode            = HAL_OSPI_DQS_DISABLE, // Data sttrobing not used
	    .SIOOMode           = HAL_OSPI_SIOO_INST_EVERY_CMD
 
	  };
 
 
	  if (
	    HAL_OSPI_Command(
	      &hospi1,
	      &cmd,
	      HAL_OSPI_TIMEOUT_DEFAULT_VALUE
	    ) != HAL_OK
	  ){
	    Error_Handler();
	  }
 
	  if (
	    HAL_OSPI_Receive(
	      &hospi1,
	      sr,
	      HAL_OSPI_TIMEOUT_DEFAULT_VALUE
	    ) != HAL_OK
	  ){
	    Error_Handler();
	  }

Thank you for your time.

Regards,

1 ACCEPTED SOLUTION

Accepted Solutions
JoseFdez
Associate

We have just found a board connection issue in the MRAM side.

Maybe the problem it's there.

The question can be closed.

Thank you.

View solution in original post

1 REPLY 1
JoseFdez
Associate

We have just found a board connection issue in the MRAM side.

Maybe the problem it's there.

The question can be closed.

Thank you.