NVIC_Init() conflict

[John Hite]

Posted on January 31, 2017 at 21:39

In the code excerpt below there appears to be contradictory settings for nvic. NVIC_IRQChannel on the lines commented

// First selection ************************** 

// Second selection **************************

In both calls to NVIC_Init() the address of nvic is used (&nvic). Or am I looking at this wrong?

Thanks,

JH

static void serial_init(void)

{  USART_InitTypeDef usart;  NVIC_InitTypeDef nvic;  RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART8,ENABLE);    USART_DeInit(DebugUart);      //UART8    USART_StructInit(&usart);  usart.USART_BaudRate = 115200;  USART_Init(DebugUart, &usart);  USART_Cmd(DebugUart ,ENABLE);  USART_DMACmd(DebugUart, USART_DMAReq_Tx|USART_DMAReq_Rx, ENABLE);    nvic.NVIC_IRQChannel = DMA1_Stream6_IRQn;      // First selection **************************  nvic.NVIC_IRQChannelPreemptionPriority = 5;  nvic.NVIC_IRQChannelSubPriority = 0;  nvic.NVIC_IRQChannelCmd = ENABLE;  NVIC_Init(&nvic);    nvic.NVIC_IRQChannel = DMA1_Stream0_IRQn;      // Second selection **************************  NVIC_Init(&nvic);}

[Tesla DeLorean]

Posted on January 31, 2017 at 21:51

>>

Or am I looking at this wrong?

Yes

You are configuring two different IRQ handlers, one for TX and one for RX. The nvic structure life collapses once the function exits, and plays no role in the control/dispatch of interrupts beyond the call to NVIC_Init(). Here one parameter is changed, and the function is called a second time, and two interrupts are configured in the NVIC

[John Hite]

Posted on January 31, 2017 at 22:52

I think the light is coming on. So the settings that applied to the first

stream (6) will apply to stream 0 too. Makes sense.

jh

On Tue, Jan 31, 2017 at 3:52 PM, Clive One <st-microelectronics@jiveon.com>