That's nice, but... what do you intend to achieve by extending the timer to 48 or 64 bits?
We have established that your counter is plenty long with 32 bits, and you processor has a 32-bit counter.
The disadvantage of this approach is that when the timer overflows, you MUST be running an interrupt to increment the higher order bits of the timer. But that will interfere with other interrupts if you're using those to measure the edges of the input signal.
On the other hand, when you do get a timer reading, it is difficult to get it right: You need to be very careful that you get the right "upper bits" wtih your sample. Of course without doing anything, you'll get it right in 99.9% of the cases, but when things roll around there can be tricky timing problems....
