ITM SWOTRACE using DMA

[Lukasz Przenioslo]

Posted on January 14, 2015 at 13:10

Hello there,

I am trying to make an efficient debug trace system on a stm32F4discovery board. For now I have an example of an application that uses ITM the standard way- it prints data in a loop. I was wondering either it is possible to use DMA for this one way transmission. I couldnt find anything about it in the datasheet/ google. There is a possibility to config an Uart DMA transfer so maybe this as well? I would aprichiate any information and help about this topic. #itm #dma #discovery

[Tesla DeLorean]

Posted on January 14, 2015 at 13:51

I seriously doubt it, but what prevents you from actually experimenting? Perhaps DMA2 from a TIM trigger, paced at a rate the debugger can sink them?

Plenty of USART TX + DMA examples out there.

[waclawek.jan]

Posted on January 14, 2015 at 14:02

It's not the primary purpose of trace features to provide a ''print'' facility. The debug modules are part of the processor, and DMA can't write into the processor.

JW

[Lukasz Przenioslo]

Posted on January 14, 2015 at 14:41

There is nothing that stops me from experimenting, well one thing actually. Im not very fluent in stm32 world yet. I was trying to gather some data first instead of trying to do something that is not possible perhaps.

[Lukasz Przenioslo]

Posted on January 14, 2015 at 15:15

I dont aggree about the printf. If not for printing information for the user what is it designed for then?

I noticed that SWO frequency can be set to a very high values. I wonder is there any real profit from using printf with uart + dma than from SWO without DMA but on for example 16800000Hz frequency?

[waclawek.jan]

Posted on January 14, 2015 at 16:57

> I dont aggree about the printf. If not for printing information for the user what is it designed for then?

Primarily, to transmit automatically generated information e.g. on program execution path, timing, etc. > I noticed that SWO frequency can be set to a very high values. Most debug adapters (''the SWD/JTAG thingy'', e.g. ST-Link) will have significantly limited receiving bandwidth. JW

[Tesla DeLorean]

Posted on January 14, 2015 at 17:32

It's not outputting at anywhere near that rate, it needs to know the core speed to set clock dividers and internal bit rates. You also probably don't have a $1K+ JTAG/SWD pod either.

Your going to be spending a lot of time in spin-loops doing no useful work waiting on the debug interface, which is not good to be doing under interrupt. So I think the debug channel is going to significantly distort the behaviour of the system, which is highly undesirable. A system with a USART and DMA, sufficient buffering, and some basic management should be reasonably transparent.

[Lukasz Przenioslo]

Posted on January 14, 2015 at 18:16

I understand now. Thank you very much for clarifications Jan and Clive.