is this the same IWDG with window enable and system WWDG???

[DKim.30]

Hello ~

I'm studying IWDG concept. (STM32F769-EVAl)

First picture is the block diagram of IWDG at reference mannuals (stm32f76xxx, stm32f77xxx). Second picture is IWDG parameter setting using Cube MX.

1. Window register doesn't exist in block diagram. Is this wrong?
2. If Window register enable in IWDG, is this the same system WWDG???

Thank you, any help might be useful.

[Peter BENSCH · Accepted solution]

Welcome, @DKim.30​, to the community!

The IWDG and the WWDG have completely different concepts, as they are also explained in the mentioned RM0410 in sections 30 and 31. The most important distinguishing features of the IWDG compared to the WWDG are the clock independent of the system (LSE, HSE, other clock sources) and the non-existing lower limit of the waiting time for the trigger pulse.

By the way, both watchdogs are also explained in training videos - just search for IWDG and WWDG on the STM32F7 Online Training site.

Does it answer your question?

Regards

/Peter

[DKim.30]

yeap. @Peter BENSCH​.

Thank so much.

[Peter BENSCH]

Great!

If the problem is resolved, please mark this topic as answered by selecting Select as best under your preferred answer. This will help other users find that answer faster.

/Peter