Hi, dear sir or madam in team,
In my project, I use STM32F407VGT6 as CPU for a digital control power supply.
I use one sector (not the last sector) of flash memory for storing some constant conversion coefficients for ADC. (There are more than 13 conversion coefficients )
The real voltage value can be obtained by multiplying the voltage coefficient with the ADC digital value.
In each Timer2 interrupt，the conversion coefficients will be read (VolCoeff1 = ( *(s32*)VOL1_COEFF_ADDR )) and used for calculating the corresponding real voltage or current. VOL1_COEFF_ADDR is a Flash memory addrss. For example, the real voltage is obtained as follows.
the real voltage=VolCoeff1 * ADC digital value.
In my projiect, the Timer2 interrupt frequency is 15kHz ( 66.7us), that means there are more than 700M read operations in one hour for the coefficient Flash sector.
(The coefficient Flash sector has been written and erased several times in developing process)
After several months, I find that some of the constant conversion coefficients stored in the flash sector are not stable!
(1) Some of the voltage coefficients is changed to zero (it can be observed in memory watch window of Keil uVision5, and the obtained real voltage is zero). The coefficients can be recovered after rewriting.
(2)In one case, a volatge coefficient is changable when it is read and observed in memory watch window of Keil uVision5, and it can also be recovered after rewriting (all of the Flash writing codes are deleted ).
I try to find the cause of this phenomenon. It seems to be the "read disturb" effect mentioned in many web pages and research papers that is led by excessive read of NAND Flash.
Can you please give me a professional explanation?
Moreover, I have another question, the core always fetches instructions in Flash memory, it is also "read" operation, can this type read operation lead read disturb effect?
and, are there some difference between access code flash memory and user defined data memory ?
Thank you very much.
