2017-05-11 07:04 AM
Suppose there's a table with two columns: column A has the destination address and column B has the value I want to write to the destination. (Destination addresses in column A are NOT contiguous) Is there any way to direct the DMA to read the destination from column A and conduct the transfer of Column B without CPU intervention? Curious about the F4 / F7 but would welcome any input on any other Cortex cores if available.
Thanks!
#memory #stm-32f7 #f7 #dmaSolved! Go to Solution.
2017-05-11 08:13 AM
DMA on these cores is pretty dumb, people who want exotic memory writing and sequencing tend to do it with FPGA/CPLD designs because it's easier and faster to do exactly what you want.
Not sure I've seen anything with scatter-gather or chaining recently. Network processors may have some more stateful handling of data on the fly.
2017-05-11 08:13 AM
DMA on these cores is pretty dumb, people who want exotic memory writing and sequencing tend to do it with FPGA/CPLD designs because it's easier and faster to do exactly what you want.
Not sure I've seen anything with scatter-gather or chaining recently. Network processors may have some more stateful handling of data on the fly.