Is there a waY to provide a Timers external Clock Signal on CH1, but only if CH2 is Active?

[AFied.1]

Hi,

I would like to provide / route a Timers external Clock Signal to CH1 pin, but only if CH2 is in Active state.

So that it acts kinda like a AND Gate.​

Is this possible? If so, how? Is there a sample somewhere I can have a look at?​

greetings and thanks,

André​

[waclawek.jan]

Not quite so. What can be done is to input external clock through TIMx_ETR and gate the timer by the slave-mode controller in Gated mode, controlled from CH1 or CH2.

JW