Is the documentation for I2C?.CR2.SADD0 wrong wrt sadd0 in 7-bit addressing mode?

[GMill.3]

The documentation for the I2C interfaces on the STM32H747_CM7 board says:

<name>SADD0</name>
<description>Slave address bit 0 (master mode) In
7-bit addressing mode (ADD10 = 0): This bit is dont
care In 10-bit addressing mode (ADD10 = 1): This bit
should be written with bit 0 of the slave address to
be sent Note: Changing these bits when the START bit
is set is not allowed.</description>
<bitOffset>0</bitOffset>

This documentation is also appears in RM0399 rev 3 page 2182. (I'd like, but it says new members can't link).

The Problem

The problem is that documentation suggests that for 7-bit addressing, bit 0 is "don't care", and that the 7-bit slave address should be written to bits 1:7. However, in my experience this does not work. To make the code work I need to write the 7-bit slave address to bits 0:6 (which seems more natural anyway, I mean, why skip the first bit?). Writing to bits 0:6 is also what the STM32CubeIDE does as is shown by its `I2C_CR2_SADD_Pos` define

#define I2C_CR2_SADD_Pos             (0U)
#define I2C_CR2_SADD_Msk             (0x3FFUL << I2C_CR2_SADD_Pos)             /*!< 0x000003FF */
#define I2C_CR2_SADD                 I2C_CR2_SADD_Msk                          /*!< Slave address (master mode) */

Question

Is this documentation incorrect about ignoring sadd0 and writing the salve address to bits 1-7? Or am I confused and doing something wrong?

[GMill.3 · Accepted solution]

(Answering my own question)

The docs are correct. The confusion is that some manufacturers specify their device address as a 7-bit address (correct), or an 8-bit address (not really correct). The 8-bit address is the 7-bit one shifted left (plus it may have a 1 in the LSB).

So for example, the WM8994 audio codec on the STM32H747 board claims to have an address of 0x34. However, that's an 8-bit address. The *real* 7-bit address is 0x34 >> 1 == 0x1A. And putting 0x1A into the cr2.sadd1 - cr2.sadd7 works correctly.