Is it possible to run a dual bank flash memory and a SW Watchodg at the same time on stm32F767VI

[nicolas239955_stm1_stmicro]

I am implementing a flash driver on a stm32F767VI.

So far the driver works fine until the running with the software watchdog. Of course, the MCU resets on a flash erase to a certain sector.

Thanks to the AN4826, I found that I could use the dual bank flash memory to execute program from flash and erase at the same time.

I configured the nDBANK option byte with stLINK Utility to perform dual bank flash operations and I already checked that I am running on dual bank mode with that code snippet :

 HAL_FLASHEx_OBGetConfig(&OBInit);
 
 if((OBInit.USERConfig & OB_NDBANK_DUAL_BANK) == OB_NDBANK_DUAL_BANK)
//DUAL BANK MODE

Then I try to erase the Sector 12 corresponding to the first sector of my second bank of flash memory :

HAL_FLASH_Unlock();
 
/* Fill EraseInit structure */
EraseInitStruct.TypeErase     = FLASH_TYPEERASE_SECTORS;
EraseInitStruct.VoltageRange  = FLASH_VOLTAGE_RANGE_3;
EraseInitStruct.Sector        = FLASH_SECTOR_12;
EraseInitStruct.NbSectors     = 1;
 
if (HAL_FLASHEx_Erase(&EraseInitStruct, &SECTORError) != HAL_OK)
{
	while(1);
}
HAL_FLASH_Lock();

It works fine when watchdog is off but resets if not.

I am missing something ? Is it possible to run wathdog and dual bank erasing at the same time ?

I have the setup to implement an external flash with SPI and I will switch to that solution if I cannot run both.

Thanks,

[TDK]

By software watchdog you mean IWDG? Or something else?

I don't see any technical limitation to this. Does it reset just because the timer runs out?

[Tesla DeLorean]

If you attempt to read from a bank you're erasing it will stall the MCU and the watchdog will fire.

The solution is to not allow that to happen.

I'm not sure how well the library is implemented, or if caching/write-buffers could cause a conflict to occur.

The banks might also be switched or interleaved.

[nicolas239955_stm1_stmicro]

I meant internal watchdog, it is a WWDG indeed.

I checked the cause of the reset, I have the RCC_CSR register to 0x4400 0000 (flag WWDGRSTF and PINRSTF raised according to RM0410 p206).

[nicolas239955_stm1_stmicro]

I also checked the map file to see if the executing code go further than FLASH_SECTOR_12 but last function address is at 0x0806b4a4

I am trying to erase sector_12 of 2Mbytes Flash memory. According to AN4826 p8 Sector_12 is located at 0x81000000 so I should not erase the bank1.

What do you mean by "caching/write-buffers could cause a conflict to occur" ?