Is it possible to avoid sequential ADC conversions to alternate conversions?

[Michael Bauer]

Hi everyone. I am writing an application which samples 2 ADC channels using DMA triggered by a timer. I have this functioning. I understand these are sequential reads. By this I mean that once the timer triggers ch 1 will sample/convert followed immediately by ch 2. So one timer trigger per two sequential ADC conversions.  

I am interested to know if it is possible to change this behavior so that when the timer triggers then ch 1 is read and then when the next timer triggers then ch 2 is read. Does anyone know how this might be done?  

[Tesla DeLorean]

Or you could do Dual Synchronous where the clock causes both samples at the same time, and you alternately ignore one of the the samples in the pair.

[Michael Bauer]

Thanks for your reply Clive. The problem I have have is that I need to compare these two signals to a reference sine wave. The comparison gets complicated if things aren't evenly spaced.

I might pursue using an interrupt to reconfigure the ADC each time. Using DMA might be preferred if that is possible. Or I could try and sample one channel exclusively for a while and then switch to the other.

Thanks

[Tesla DeLorean]

Dual Sync, both samples would be at the same instance and paced by a timer, so it would be hard not to be "evenly spaced"

[Michael Bauer]

Thanks Clive for the suggestion. I think I misunderstood what you were meaning before. I am unfamiliar with this mode and haven't found anything in the reference manual or HAL guide. Can you elaborate about this topic and possibly point me to where this mode is described in the RM? I am a bit confused since there is only one ADC and SAR and how two conversions could be at the same time. If this is possible then that would solve my issue right away.

Before when I said I needed even spacing what I meant was that I have a reference sine wave table which I need to compare the two sampled ADC channels. If the two ADC channels have any time separation of when they were sampled then I would need to compensate for that in my comparison to the reference sign wave table. I know the spacing between the timer triggers but I am not sure about the spacing from the first sample to the second. Its just easier if the samples are either at the exact same instance or if I space them by the timer period. If you have any other ideas of how to do this better then I would appreciate it.

Thanks again.

[Michael Bauer]

I suspect you were referring to Dual regular simultaneous mode. I found some information on this in "STM32' ADC modes and their application" (AN3116). I don't think this will work for me since my processor STM32L43x only has one ADC. Thanks for the info anyhow.