2007-12-20 01:18 AM
interupt latency
2011-05-17 03:20 AM
Hi espresso_solo,
as GPIO pins are mapped on the fast APB bus at the same frequency as the CPU the interrupt latency is only the path from APB to the CPU then the entry to IRQ routine as detailed by the Cortex-M3 Technical Reference Manual on www.arm.com . Regards, STOne-32 [ This message was edited by: STOne-32 on 20-12-2007 14:48 ]2011-05-17 03:20 AM
What is the interupt latency för the stm103X?
Specifacally the interupt latency for a level shift on one of the GPIO pins. I suppose it depends on clock speed.