2013-08-12 11:14 AM
Hi
I am using the I2S bus to transfer audio samples from an audio codec module to the microprocessor. There are several standards for I2S like Phillips, MSB, LSB or PCM. With the Phillips standard, everything works fine (see first attachment with audio sample values for background noise). When I switch to MSB (left-justified) by setting the value in the I2S init struct and changing the configuration of the audio codec, I get strange values (see 2nd attachment). I figured out that the value 127 for the upper byte should be 255 and 128 should be 0. What's wrong? Here my I2S config:RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
I2S_StructInit(&I2S_InitStructure);
I2S_InitStructure.I2S_Mode = I2S_Mode_SlaveRx;
I2S_InitStructure.I2S_Standard = I2S_Standard_MSB;
I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_8k;
I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b;
I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable;
I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low;
SPI_I2S_DeInit(SPI2);
I2S_Init(SPI2, &I2S_InitStructure);
I2S_Cmd(SPI2, ENABLE);
2013-08-12 12:39 PM
Seems to be an endian issue rather than alignment. I'd expect the data to be MSB first on the wire.
AIC23?2013-08-12 01:24 PM
TLV320AIC26
Endian? I thought all I2S standards are MSB first?2013-08-12 01:38 PM
Indeed, but the CPU is little endian, and I don't know how you're decomposing those numbers.
2013-08-13 12:49 AM
Well, the audio samples are copied into a global array by DMA:
uint16 audioSamplesBuffer[800];
I output the first audio sample whenever the TC interrupt of the DMA occurs:
sprintf(buffer, ''%d, %d, %d'', audioSamplesBuffer[0], audioSamplesBuffer[0] >> 8, audioSamplesBuffer[0] & 0x00ff);
PrintLineOverUSART(buffer);
It is especially confusing to me because the whole thing works when I useI2S_Standard_Phillips, but it does not when I switch toI2S_Standard_MSB...
2013-08-13 04:31 AM
I checked the received bits from the audio codec in left-justified mode with a logic analyzer and they look good. The received sample values at background noise level include:
0..5 and 65531..65535So the problem must lie on the microcontroller side. Is I2S_Standard_MSB not the same as left-justified? Or is it an endianness problem?[edit] I just read through the reference manual and found a confusing note:The I2S slave must be enabled after the external master sets the WS line at high level if theI2S protocol is selected, or at low level if the LSB or MSB-justified mode is selected.So what does this exactly mean if I use MSB-justified? [edit2] I changed the polarity mode to I2S_CPOL_High and now the samples look much better... strange. Is this a bug in STM32 lib or must the idle polarity really be high?2013-08-14 02:19 AM
> [edit] I just read through the reference manual and found a confusing note:
> The I2S slave must be enabled after the external master sets the WS line at high level if the
> I2S protocol is selected, or at low level if the LSB or MSB-justified mode is selected. > > So what does this exactly mean if I use MSB-justified? This exactly means, that the I2S slave must be enabled after the external master sets the WS line at low level. Wait for it in a loop. See the related item in errata. JW PS. Your nick is pathetic.