2017-06-16 06:23 AM
Hi
We have designed one system where we are using STM32F407 as the Master uC and STM32F103 as the slave(individual board) uC. Now our system is such that there are several slave (50 slaves) connected ot the master on I2C bus. We are using 4.7k pull resistor on each individual board (Master and all slave).
At present We are using 7bit I2C address, but now wanted to use 10bit now as we want to increase the no of slave connected to the master.
Now we wanted to connect more slave with the system but does not have idea how many we can connect on the same I2C bus with 10bit address. We know we can go up to maximum of 400pf of the bus capacitance but these capacitance is applicable if we use wire only or pcb bus capacitance also comes in the picture?
Can anyone help so we can determine what is the maximum no. of slaves we can connect to the bus.
#i2c-hardware #i2c--no-of-slave-connection-possibility2017-06-16 12:02 PM
Connecting 50 slaves will yield an equivalent very low resistor...
Have you tried 10 kohm on the master side and 50k discrete on each slave?
When the number of slaves goes high and degrades bus speed performance, it might be worth using multiple I2C buses to clusters of slaves. If 100kbps is good enough, 2 GPIO plus SW bit banging may do the job for the master MCU.
Otherwise, using SPI 3 or 4 wire mode, in daisy chain mode could be contemplated.
2017-06-17 12:59 AM
Dear Jive
Thanks for the reply and support.
But for 10bit address we can connect maximum 1023 devices on I2C Bus
Correct? If its true how we can match the 400pf bus Capacitance so we
can connect maximum slaves.
Actually our system is on the batch production stage and we are thinking
of the next product where we can extend the no of slaves, so we need to
think on I2C only.
Can you suggest any idea how we can match it or need any information on
it please let me know.
Thanks
Krunal Shah
2017-06-17 09:32 AM
For I2C the bus capacitance is probably not the right parameter to look at.
Use an oscilloscope at the master and last slave on the bus.
Use the slave optional GPIO pull-up if available and activate it only for the last slave on the bus end(s).
Reduce the master resistor to improve the rise edge slew rate at the expense of a higher current.
The max speed of I2C may depend on all these and the bus capacitance and serial bus resistance of the tracks/connectors.
Each MCU has pad capacitance of few pF which will add-up to the number of slaves on the bus.
Make sure to use SPEED GPIO options to highest for best slew rate.
Also check how much skew you still have between clock and data edges for proper communication and low bit error rate.
2017-06-20 10:01 AM
Dear
Please find the attached waveform capture after we connect 10slave, 20
slave and 30 slave respectively to the BRIAN/MASTER. From the wave form
it is clear that there is no effect of capacitance or anything else.
Now i want to disturb these communication and wants to see which
parameter is effecting communication, can you please help me how i can
do the same? I mean what should i add to these I2C lines so that it get
disturbed.
In wave form - SLAVE means the last slave which we attached to the BUS
and BRAIN means the MASTER.
Thanks
Krunal Shah
________________ Attachments : Waveforms.zip : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HybR&d=%2Fa%2F0X0000000b9z%2Ft0u9zhfsy4xvLUkKJJNCgITgxJbhi2YRgMz8M1PdaV8&asPdf=false