Posted on May 17, 2011 at 13:34We have a problem with the I2C bus hanging with the clock stopping in a high state and the data line low. There are two slave devices on the I2C2 bus, an EEPROM and a DAC. This occurs at 200 and 100 KHz bus speeds.
This occurs when we write to the EEPROM device, a 53 byte packet, with a data pattern of 1d xx some place in the 53 byte packet, where xx must be non-zero. The logic analyzer shows the 1d and the ACK on the bus, the bus is hung before the xx byte is transmitted. This information alone would indicate a processor problem. But when we pick up the power pin on the DAC the complete packet is transmitted with no errors. This information would lead you to suspect the DAC. But the xx byte is never seen by the DAC!!
The above is repeatable and is not a random event.
Does anyone have any idea what may be happening? :(
