2022-07-04 10:11 AM
static void MX_SPI1_Init(void)
{
/* SPI3 parameter configuration*/
SpiHandle.Instance = SPI1;
SpiHandle.Init.Mode = SPI_MODE_MASTER;
SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT;
SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW;
SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE;
SpiHandle.Init.NSS = SPI_NSS_HARD_OUTPUT;
SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE;
SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
SpiHandle.Init.CRCPolynomial = 0x0;
SpiHandle.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
SpiHandle.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
SpiHandle.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
SpiHandle.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
SpiHandle.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
SpiHandle.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_02CYCLE;
SpiHandle.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_02CYCLE;
SpiHandle.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
SpiHandle.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
SpiHandle.Init.IOSwap = SPI_IO_SWAP_DISABLE;
if (HAL_SPI_Init(&SpiHandle) != HAL_OK)
{
Error_Handler();
}
}
uint8_t mcp23s17_read_reg(uint8_t reg, uint8_t hw_addr)
{
uint8_t control_byte = get_spi_control_byte(READ_CMD, hw_addr);
uint8_t tx_buf[7] = {control_byte, reg ,0};
uint8_t rx_buf[3] = {0, 0 ,0};
switch(HAL_SPI_TransmitReceive(&SpiHandle, (uint8_t*)tx_buf, (uint8_t *)rx_buf,(uint16_t) 3, 5000))
{
case HAL_OK:
break;
case HAL_TIMEOUT:
Timeout_Error_Handler();
break;
case HAL_ERROR:
Error_Handler();
break;
default:
break;
}
// return the data
return rx_buf[0];
}