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How to utilize 4.2MB RAM in STM32N6

Jayesh2
Associate II

Hi,

I am using STM32N6570-DK kit. In my application I need ~3.5MB of RAM but if I allocate more than 256KB of RAM I get the error "region `RAM' overflowed by xxxx bytes". 

 

I got the same results as well when I imported "UART_HyperTerminal_IT" example for STM32N6 and added 256KB buffer. I got the same error "region `RAM' overflowed by 3328 bytes". I am attaching the same code here for reference.

I thought STM32N6 has 4.2MB of RAM as mentioned in datasheet. How can I fully utilize it? 

6 REPLIES 6

Describe distinct memory regions in the Linker Script, and then associate allocations to specific portions via attribute/name on compiler side 

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@Tesla DeLorean Thank you for the reply.

 

After further study I found that I was creating FSBL project which has maximum size capped at 512KB. After that I think I found a right way to develop application. But still I think I can only play with 2048 KB. 

 

Build "Template_FSBL_XIP" from "STM32Cube\Repository\STM32Cube_FW_N6_V1.0.0\Projects\STM32N6570-DK\Templates" 

I took one dummy array for testing. If I increase the RAM size in "STM32N657XX_XIP.ld" to more than 2048 code does not boot up.

Jayesh2_0-1739267513999.png

 

Attaching Template_FSBL_XIP example. Can you please modify the project to utilize maximum RAM?

 

ANJS
ST Employee

Hello!
By default the AXISRAM3/4/5/6 is disabled. If you want to use them, you need to clock them all earlier (in FSBL)  before copying the data to these memories.

ANJS_0-1739294129132.png

using HAL code:
__HAL_RCC_AXISRAMx_MEM_CLK_ENABLE()

Make sure that they are not power down in RAMCFG registers 

ANJS_1-1739294332485.png
Best regards
ANJS

 

Jayesh2
Associate II

We attempted to enable AXISRAM3/4/5/6 using the __HAL_RCC_AXISRAMx_MEM_CLK_ENABLE() HAL API, but we were unable to run the application. In application we are using 3072K uin8_t buffer, and we verified that it does not entered the application.
Upon reviewing the datasheet, we found that Bit 20 (SRAMSD: Shutdown AXISRAMx) must be set to zero to ensure the memory remains powered. However, despite this configuration, we still observed a power-down variable value of 1.
Below is a snapshot FSBL code for refrence. 

 

image (12).png

 

Please guide us to any reference or application note achieve full STM32N6 RAM use. 

ANJS
ST Employee

Hello!
 1- In your snapshot, it seems you're executing your code in secure mode, try to access the RAMCFG register with the secure address alias instead of the non-secure one!

2- Actually, if you add all AXISRAMx, you get 3.75MB! But in order to have the 4.2MB of memory, the NPU Cache (CACHEAXI) and the VENCRAM is used as system SRAM. Indeed, they are used by the NPU, and the VENC but when NPU and VENC are not used, these SRAM can be accessible by the CPU as normal AXISRAM.
So you need also enable these SRAM clocks

ANJS_0-1739799669096.png

By default, the CACHEAXI is in SRAM mode when the CACHEAXI is not activated.
But for the VENCRAM, you need to make sure that:
- the VENC is disable
- in the SYSCFG_VENCRAM register, the VENCRAM is available for the system.

ANJS_1-1739799902394.png

3 - For all of these RAM, always don't forget to make sure that they are not power down in the RAMCFG register.

Best regards
ANJS

In the template code, there is no non-secure application. However, since we are accessing the RAMCFG register from a non-secure application, we added the CPU_IN_SECURE_STATE  macro to access the RAMCFG register using the secure address. Despite this change, we are still unable to jump into the application.