2016-09-01 10:53 AM
I am going to try some timings. I found some examples. In one example there was an address given for both registers. Is it always the same for all CPUs and is it necessary. The rest SW is with Cube.
Very long links to both ways. Which should I use. No addresses https://my.st.com/public/STe2ecommunities/mcu/Lists/STM32Java/Flat.aspx?RootFolder=%2fpublic%2fSTe2ecommunities%2fmcu%2fLists%2fSTM32Java%2fDelayWait%20function&FolderCTID=0x01200200770978C69A1141439FE559EB459D758000F9A0E3A95BA69146A17C2E80209ADC21¤tviews=64 With address https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=https%3a%2f%2fmy%2est%2ecom%2fpublic%2fSTe2ecommunities%2fmcu%2fLists%2fcortex%5fmx%5fstm32%2fDWT%5fCYCCNT%20%20%20%2d%2d%20explanation&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F...2016-09-01 11:30 AM
They are ARM core registers, but optional for the licensee, ST choose to use them in the STM32 designs for the M3 and M4 cores, and their address is fixed and define in the ARM TRM. One might not choose to use them to reduce silicon, power, or fit in an FPGA, or meet timing goals (critical paths).
The M7 might be slightly different, or require magic unlock sequences2016-09-01 12:45 PM
So, these addresses are defined somewhere else and I don't need to put them in code the myself like in one of the examples?
With M3 and M4.2016-09-01 01:51 PM
They are defined in the manual, you'd need to set up the appropriate variable or structure. They are not in core_cm3.h or core_cm4.h like some of the ITM stuff at 0xE0000000
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337h/BABJFFGJ.html