How to use PA15 on STM32F302RD?

[Clemens Ehm]

Hey,

I can't access PA15 with the STM32F302RD µC. It's obv used for JTDI but it's possible to change this mode (if I can trust the reference manuel). With the "flexible SWJ-DP pin assignment" I have to change the mode to "JTAG-DP Disabled and SW-DP Enabled" and PA15 should be usable as a GPIO. But I have totally no clue how to do this. Can anyone help? (Please no HAL Lib Command, just direct register access or StdPeriph).

[waclawek.jan]

> I have to change the mode to "JTAG-DP Disabled and SW-DP Enabled"

This is the mode of the debugger, i.e. you should refer to the manual of the debugger to learn how to change between JTAG and SWD.

In the mcu you can then use that pin as you use any other pin, changing its mode in MODER, and if set to AF, changing particular AF in AFRH, as required.

JW

[Clemens Ehm]

Well, is it possible just with the MCU and without any external hardware?

I just need access for PA15, that's all.

[waclawek.jan]

I edited the post above after you replied, read it again please.

If you don't use the debugger, or the debugger doesn't use this pin, you can use it as any other pin.

You still can use the debugger at least for "burning" even if you change MODER/AFRL/H of any of the debug-connection pins, if you connect under reset (either manual, or hardware reset driven from the debugger).

JW

[Clemens Ehm]

	// GPIOA Periph clock enable
	RCC->AHBENR |= RCC_AHBENR_GPIOAEN;
 
	//Output pin
	GPIOA->MODER |= ( GPIO_MODER_MODER15_0); // Configure PA15 in output  mode
	GPIOA->OTYPER &= ~( GPIO_OTYPER_OT_15); // Ensure push pull mode selected--default
	GPIOA->OSPEEDR |= ( GPIO_OSPEEDER_OSPEEDR15); //Ensure maximum speed setting (even though it is unnecessary)
	GPIOA->PUPDR &= ~( GPIO_PUPDR_PUPDR15); 	//Ensure all pull up pull down resistors are disabled
 
	while (1)
	{
		GPIOA->ODR = GPIO_ODR_15;
		my_delay_ms(500);
	}

This simple code has no effect on PA15. The GPIO Moder is defined as output but the output of the pin is always high (3V3). Also using GPIOA->BSRR = GPIO_BSRR_BR_15; has no effect.

[waclawek.jan]

First, you don't want to access GPIO registers immediately after enabling its clock in RCC - see errata (maybe it's not in the particular 'F302 errata, I don't use the 'F3 and don't care to check, but the timing problem quite certainly is present there too).

Second, note, that GPIOA_MODER's reset value is not 0x00000000 - that's exactly because PA15 (and PA13 and PA14) is already set to AF after reset rather than input; so by ORing the 0th bit of MODER15 field you effectively set PA15 to Analog.

JW