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Erik Van Hamme
Associate
March 13, 2017
Question

How to use 4 i2s peripherals on same clock?

  • March 13, 2017
  • 4 replies
  • 1195 views
Posted on March 13, 2017 at 12:25

Hello *,

I am trying to assess feasibility of using a STM32f411 in combination with 2 4 channel class D amplifier chips (FDA4100LV) to make a USB connected surround amplifier for my computer.

I have the skills to make the USB communication and DMA buffering work. What I am uncertain about is how to use 4 i2s peripherals in sync. Each i2s peripheral seems to be outputting its own clock when configured in master mode. Is it possible to have one peripheral output the clock + 2 channel data and the 3 other peripherals output only 2 channel data on the same clock as the first i2s?

I am sorry if this question was asked before. I am dealing with quite some time pressure here and I do not have the time to do my own proper research on this matter. If someone could point me in the right direction, it would help me a lot.

Thanks, Erik.

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    4 replies

    waclawek.jan
    Super User
    March 13, 2017
    Posted on March 13, 2017 at 21:44

    Each SPI/I2S is a halfduplex unit capable of being master or slave, so yes, this should be doable, if you have a chip with 4 I2S-capable SPIs... is such among the STM32s? I have doublts the 'F411 is, I did not check.

    You'll need to connect the clocks externally and watch for the GPIO matrix if this is possible at all on the package of your choice, there is quite a contention of functions on the SPI-connected pins.

    Some STM32s (e.g. the original, now mid-class 'F4 line) have a crippled SPI/I2S unit marked as I2Sext which is slave-only and with internally connected SCK+WSCK to its 'master' unit. It should be possible to set both as slave, this would spare down pins and wiring, but needs to be tried. Again I don't know about the 'F411 but that's a baseline so I have doubts.

    I am not sure about the connections to FDA4100V though, the public databrief hints about one clock and two data (and a rather cryptic Sinc input, which IMO might be the master clock). The I2S has TWO clocks though, plus the master clock as third, so I don't know how does this connect to that chip.

    Note that in STM32 the master clock is fixed to 256* WSCK and the framing is fixed to 16- or 32-bit samples (x2 for stereo) per frame.

    The SAI might be perhaps more flexible - I see TDM mentioned in that brief but I am no expert in that one.

    JW

    waclawek.jan
    Super User
    March 13, 2017
    Posted on March 13, 2017 at 21:57

    Ugh, looked at the 'F411 an I am much impressed, 5 SPI/I2S and the I2S2ext/I2S3ext present... not on the block diagram though (ST, do you listen?)

    JW