How to set up MDK-ARM, cmsis, stlib 3.5.0 for 16Mhz HSE

[sam239955]

Posted on December 07, 2011 at 00:25

Hi,

i want to know how to setup my stm32f103ze (HD) project correctly to 16mhz HSE. I build up a device with 16mhz NOT 8mhz. I want to use USB and USART too. It would be nice to have a helping hand. with regards sam

[sam239955]

Posted on December 07, 2011 at 01:52

the solution:

USE_STDPERIPH_DRIVER, STM32F10X_HD, HSE_VALUE=16000000 in keil as preprocessor variable and set XTAL to 16.0 here is my init of rcc_clocks for my stm32f103zet6 /******************************************************************************/ /* SETUP.C: Setup Functions                                                     */ /* IMU200 16MHz HSE      72Mhz = 16Mhz/2*9                                    */ /******************************************************************************/ #include ''stm32f10x.h''                            /* STM32F10x Library Definitions      */ #include ''misc.h'' #include ''Setup.h'' extern volatile unsigned char  Clock1s; extern volatile unsigned char  Clock100ms; extern volatile unsigned long  TimeTick; /* Variables */         ErrorStatus HSEStartUpStatus; GPIO_InitTypeDef  GPIO_InitStructure; I2C_InitTypeDef  I2C_InitStructure; SPI_InitTypeDef  SPI_InitStructure; USART_InitTypeDef USART_InitStructure; void SetupClock (void) {  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/            /* RCC system reset(for debug purpose) */   RCC_DeInit();   /* Enable HSE */   RCC_HSEConfig(RCC_HSE_ON);   /* Wait till HSE is ready */   HSEStartUpStatus = RCC_WaitForHSEStartUp();   if(HSEStartUpStatus == SUCCESS)   {     /* Enable Prefetch Buffer */     FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);     /* Flash 2 wait state */     FLASH_SetLatency(FLASH_Latency_2);       /* HCLK = SYSCLK */     RCC_HCLKConfig(RCC_SYSCLK_Div1);       /* PCLK2 = HCLK */     RCC_PCLK2Config(RCC_HCLK_Div1);     /* PCLK1 = HCLK/2 */     RCC_PCLK1Config(RCC_HCLK_Div2);     /* On STICE the PLL output clock is fixed to 72 MHz */     RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_9);     /* Enable PLL */     RCC_PLLCmd(ENABLE);     /* Wait till PLL is ready */     while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)     {     }     /* Select PLL as system clock source */     RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);     /* Wait till PLL is used as system clock source */     while(RCC_GetSYSCLKSource() != 0x08)     {     }  } /* set SysTick */     SysTick_Config(72*1000*10); /* Enable GPIO Clocks */     RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);     RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);     RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);     RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);     RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);     RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOF, ENABLE);     RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);     }