Posted on August 22, 2017 at 09:46We are using quite a few stm32 MCUs from 401 to 439, and our program becomes more and more complicated. In order to avoid possible deadloop, we have used watchdog to rescue the system, basically it is working well now. For quality improvement consideration, we want to know more about where watchdog reset occurs. And I've collected following information:
. When a watchdog reset occurs, all RAM data won't be changed.
. The status Reg RCC_CSR has a flag to indicate if it is an (indepent)watchdog reset or not
With this 2 pre-condition, we think it might be possible we save the field status to a reserved section(also RAM area), and later we dump out these data by a certain I/F such as USB, for static analysis.
Here comes my question:
1. Is the 2 pre-condition true? ( I made the experiment and it is true in my test but I want to make sure it covers all)
2. Is there any code in your side that has similar implementation?
3. We are using FreeRTOS, the watchdog is feed in maintask, which manages other tasks. Therefore it is possible that maintask is hang but other task is still running, will that affect the final field(I'm sorry that actually I'm not sure what is the details of this 'field', because in FreeRTOS case, there are many Stack).
Anyway who has similar debugging skill, please also share the way with me, thank you!
#debugging #stm32f4 #wathdog
