For what reason/purpose? The question lacks context.
It sets a flag in the MCU which causes it to ignore maskable interrupts, and not alter execution flow. You might find more details of the mechanics in documents like the TRM, and related texts.
You can disable them at the peripheral level and also at the NVIC.
The NVIC will block interrupts that can't pre-empt the currently executing one.
The NMI and RESET are non-maskable.
CPSID I / CPSIE I
