Help with I2S Rx and DMA configuration......output works fine

[ronan2]

Posted on October 01, 2011 at 13:54The original post was too long to process during our migration. Please click on the attachment to read the original post.

[Tesla DeLorean]

Posted on October 01, 2011 at 15:12

Check that SPI3's APB1 clock is enabled, and DMA2's AHB clock is enabled. Not saying you're not doing it, just don't see the code.

Not sure what tools chain and library you're using but you should find a list of interrupts handlers in something like stm32f10x_it.c, stm32f10x.s or startup_stm32f10x_hd.s

[ronan2]

Posted on October 01, 2011 at 19:23

Hi Clive,

Yes those clocks are enabled all right, just forgot to copy the clock configs into code. I'm using the Raisonance RLink and stm32 firmware lib v3.12. Of course I just checked the header file, stm32f10x.it and it lists the prototypes for the interrupts. Funny enough it only lists the following in terms of DMA: void DMAChannel1_IRQHandler( void ); void DMAChannel2_IRQHandler( void ); void DMAChannel3_IRQHandler( void ); void DMAChannel4_IRQHandler( void ); void DMAChannel5_IRQHandler( void ); void DMA1_Channel5_IRQHandler( void ); void DMAChannel6_IRQHandler( void ); void DMAChannel7_IRQHandler( void ); -> The interrupt I am trying to service has no header! I'll investigate further.......perhaps I have to update libraries or insert the header Will check back when I check it out. Thanks dude!

[Tesla DeLorean]

Posted on October 01, 2011 at 23:50 The original post was too long to process during our migration. Please click on the provided URL to read the original post. https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I6YL&d=%2Fa%2F0X0000000bqa%2FOR1pUzWCFE_SKPXF8j2W0T4RoOI6.VlaRYAuK4Iz.Zw&asPdf=false

[ronan2]

Posted on October 02, 2011 at 13:26

Hi Clive,

I know it's pretty messy, sorry. This is a project I've had on the shelf for a few months, so it's taken me a couple of days to get my head around it! I've been doing mostly Java desktop stuff recently. The part is STM32F105vct6, which has DMA2. On examining startup_stm32f10x_cl.s the function prototype is DMA2_Channel1_IRQHandler. I've set up the codec as master and the I2S in question as slave recieve as this makes more sense with the DMA control. It seems the I2S3 or DMA2 is freezing when data arrives as if in a continuous subroutine, because the DMA transfer to I2S2 stops. The DMA2_Channel1_IRQHandler is never entered. A problem I have is that I have to disable JTAG to allow access to the pins for I2S3, so I can't read the registers while I2S3 is actually receiving, and am relying on toggling a pin output to check when the DMAs are firing. Is it possible I'm crashing the NVIC controller using some sort of bad configuration? Thanks again for you help

[Tesla DeLorean]

Posted on October 02, 2011 at 13:58

You might want to add a GPIO output in the Hard Fault Handler, or use the serial port to provide some telemetry. A foreground heartbeat GPIO might tell you if it's locked up somewhere else.

I haven't looked at the exact pin configuration, could you still use SWD mode? The NVIC can give problems if the interrupt source isn't actually cleared by calling the IRQ routine (ie perhaps it's calling a stub routine). In this case you get stuck in an infinite tail-chaining loop, and it never executes foreground code again.

[ronan2]

Posted on October 02, 2011 at 13:58

Ah ok, I've tried checking some of the ISRs, and it's triggering the hardfault handler routine.

[ronan2]

Posted on October 02, 2011 at 14:17

Hi Clive,

Happy to be getting somewhere with this. I added a GPIO toggle in the Hardfault ISR and its triggering continuously at about 1.6MHz. I'll have a look at the pinout for SWD, last time I was using the I2S as master and needed one more pin. I'll do some more reading on the NVIC and try the other ISRs too. Thanks, Ro

[ronan2]

Posted on October 04, 2011 at 23:35