Hello, How does reducing the bit count of the ADC peripheral affect the quoted SINAD in the datasheet, if at all?

[JHIEB.1]

For example, I wish to use ADC1 (14 bits max) of STM32U575 at 12 bits, single ended. The datasheet guarantees a minimum of 68 dB for the SINAD, does this figure get reduced from 14 bits to 12 bits? If so, by how much?

Thanks,

Joel

[Billy OWEN]

Hi @JHIEB.1​ 

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Regards,

Billy

[JHIEB.1]

Hi again,

I did some digging on the topic and the answer seems quite simple: If I set the resolution to 12 bits, the SNR for an ideal ADC should be 12x6.02+1.76 = 74 dB, which is clearly more than the 68 dB min SINAD figure, so I won't lose any accuracy by doing so. Actually, as long as the resolution is at least equal to the worst case ENOB, I won't lose any (AC) accuracy. Can anybody confirm?

Thanks,

Joel

[AScha.3 · Accepted solution]

yes, basically your right.

• to be 100% sure, try both and check result.
• on average, the 14b data should have lower noise

[JHIEB.1]

Thanks!

[Piranha]

> on average, the 14b data should have lower noise

You can capture or add how many bits you want, but the data cannot have a lower noise than the ENOB.