Hi,
When trying to run a simple TrustZone+UART project generated by STM32CubeMX*, the chip raises a HardFault when switching to NonSecure mode. In the HardFault handler, the Cortex-M33 CFSR registrer is set to 0x400, indicating an instruction bus error, and lr set to 0xffff_ffa9 (i.e. raised from non-secure code).
The NonSecure code area's access flags (using the TT instruction etc.) is 0x02be0100 (i.e. should allow NS access) and the MPU is disabled, so that doesn't seem to be the issue. This thread details a similar problem, where the GTZC is protecting some regions of RAM from NS access. However, I've set all entries of MPCBB_SecConfig_array to zero (in the autogenerated MX_GTZC_S_Init() function), and that doesn't solve the issue.
Does anyone know what could cause this, and how to fix it?
Thanks.
