Posted on May 17, 2011 at 12:27I could not find any reasonable fast FFT and IFFT routine for STM32 so I wrote my own in highly optimized assembly. FFT runs at around 70 - 75% of speed when compared with STR910 implementation(at same clock frequency). It requires roughly same amount of cycles as dsPIC optimized FFT. I estimate it is almost twice so fast as ARM7 FFT.
Enjoy :D
Some highlights:
- Radix 4 FFT /IFFT - supported sizes: N=4,16,64,256,1024,4096
- N>4096 possible with custom coefficients
- 16 bit complex arithmetic, 1Q15 coefficients
- input data remains unmodified
- decimation-in-time with auto scale after each stage - no overflow
- GCC version (Code Sourcery G++ Lite 2007q3-53), requires C preprocessor
- hand optimized THUMB2 assembly for Cortex-M3 (tested with STM32)
- code optimized with 64 bit flash prefetch and branch speculation in mind
- single function for multiple FFT sizes
- functions are both ''C'' and assembly callable
STM32 FFT benchmarks in CPU cycles based on real hardware measurements:
N - FFT size
L - Flash latency
F,R - coefficients in Flash or RAM
....N....L=0 F/R....L=1 F....L=1 r*....L=2 F*....L=2 r*...ARM7TDMI...ARM9E...dsPIC
....64.....3575......3797......3636.......4588......4007..........-............2701....3739
...256....19425.....20685....19743....25144.....21685..38461-43920..13740..19055
.1024....98541....105113...100074...128070....109634.......-...........68534....N/A.
Notes:ARM9E - DSP enhanced arm9 core, based on STR910 @96 MHz, RAM coefficients
dsPIC - dsPIC30x / dsPIC33x - results based on Microchip's DSP library
ARM7TDMI - 3rd party, web based benchmark results
*STM32 results for latency L=2 or - source compiled with LATENCY2 defined
IFFT benchmarks (calculated and verified by measurement):
add 6+N/4 to FFT benchmark {22,70,262} for N={64,256,1024}
Code size:
FFT only: 480 bytes
FFT+IFFT: 682 bytes
Coefficient size (Flash or RAM):
N: 16 64 256 1024 4096
size: 48 240 1008 4080 16368 bytes
