Posted on June 13, 2018 at 21:06 Hi,
I am using Nucleo-144 connecting CAN RX/TX PD0/PD1 to external CAN transceiver, PEAK.
The function is pretty straight forward. Prepare data then call
HAL_CAN_AddTxMessage() to transmit.
CAN_TxHeaderTypeDef TxHeader;
TxHeader.StdId = 0x321;
TxHeader.ExtId = 0x01;
TxHeader.RTR = CAN_RTR_DATA;
TxHeader.IDE = CAN_ID_STD;
TxHeader.DLC = 2;
uint8_t txData[8] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08} ;
HAL_StatusTypeDef status = HAL_CAN_AddTxMessage(m_can, &TxHeader, txData, (uint32_t *)CAN_TX_MAILBOX0);
The
HAL_CAN_AddTxMessage() function bailed out on the CAN_TSR TME0/1/2 are all RESET. From the manual, seems all 3 mailboxes are full.
Why it's always full from the very beginning? How do I control this? __HAL_CAN_CLEAR_FLAG() doesn't have this flag.
/* Check that all the Tx mailboxes are not full */
if (((hcan->Instance->TSR & CAN_TSR_TME0) != RESET) ||
((hcan->Instance->TSR & CAN_TSR_TME1) != RESET) ||
((hcan->Instance->TSR & CAN_TSR_TME2) != RESET))
{
/* Return function status */
return HAL_OK;
}
else
{
/* Update error code */
hcan->ErrorCode |= HAL_CAN_ERROR_PARAM;
return HAL_ERROR;
}
Bit 28 TME2: Transmit mailbox 2 empty
This bit is set by hardware when no transmit request is pending for mailbox 2.
Bit 27 TME1: Transmit mailbox 1 empty
This bit is set by hardware when no transmit request is pending for mailbox 1.
Bit 26 TME0: Transmit mailbox 0 empty
This bit is set by hardware when no transmit request is pending for mailbox 0.
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