2015-05-01 06:43 AM
Hello
Which DMA(1,2), stream and channels can be used for GPIO to memory transfers?Thanks.2015-05-01 08:34 AM
I would expect the manual and a little experimenting would get you to a definitive set of answers. The main driver I have is what generates the request signal as that dictates the channel/stream relationship.
I've posted several working examples2017-10-27 12:25 AM
Hello Clive One,
Your link doesn't work for me - do you have an updated link or maybe it is posted somewhere else?
The particular part I have does have an internal USB peripheral; but the design I am using has external USB attached to GPIO (FIFO); would like to be able to DMA that as an 8-bit register to/from internal SRAM.
In this case would have to be async unless I can use one of the control signals as a sync pulse; which may be possible.
Thanks In Advance,
John W.
2017-10-27 03:21 AM
Clive's link is
https://community.st.com/0D50X00009XkiEgSAJ
Note, that there is a significant difference between DMAs in F2/F4/F7 and F1/F0/L0/L1/L4; and also there's a difference in placing the GPIOs in the buses system, the significantly differing being F1 and L0 (and, of course, H7, which is another world on its own). As Clive said, the RM and the DMA ANs (AN4101/AN4031 and AN4666 which deals specifically with your question) are your friends.
JW
2017-10-27 04:04 AM
Thanks for the quick help Jan, yes, on this particular processor; since they did an async I/F - will be difficult - still; nice to see how you guys have been dealing with it.
Thanks Again; and Have A Great Weekend!
John W.