FW upgrade over I2C from XMC/Infineon chip, intermittent failures (NACK, busy), ROM bootloader fail?

[RPham.1]

I'm trying to do a FW upgrade on the STM32F427IGH6 chip, having an Infineon XMC4800-F144K2048 chip as the master and the STM chip as the slave. They're connected via I2C; I've confirmed that the lines are connected properly, as I'm able to send data from the STM to the XMC - it's when the STM becomes the slave (and goes into the ROM bootloader) where several things can occur when the FW upgrade fails:

1. NACK received by XMC from STM

2. ACK received by STM, FW upgrade process begins, but then fails mid-way as the I2C bus is "busy"

I've also attached a scope to look at the signals on the I2C bus; edges and timing look ok. What could be possible reasons for the STM chip (while it's in the ROM bootloader) seemingly locking up or failing to send an ACK during this FW upgrade process?

[TDK]

Does it always fail at the same point? If so, perhaps IWDG or another interrupt is trying to fire. How are you entering the bootloader?

Could always be an issue with the I2C commands midway through. A logic analyzer would answer that pretty quickly.

How exactly are you determining that "I2C bus is "busy""?