2014-09-01 05:20 PM
I'm trying to connect from an STM32's FSMC to block-RAM inside an FPGA. Since this type of memory is synchronous, I need to expose the FSMC clock to the FPGA.
At the moment I have an STM32F4-Discovery connected to a logic analyser to check that the signals are behaving as I would expect. When I configure the device as an asynchronous SRAM as per the STM324xG_EVAL in the STM32Cube library examples, I can see the pins toggling basically as I would expect, but with no activity on the clock line. I'm finding the documentation extremely vague for synchronous operations, can I can't find any examples.But, when I change memory to burst mode, I can see activity on the clock line, but nothing else toggles. I'm not sure if this is because the FSMC module is waiting for an extra signal or something, but I can't get it to write to the bus; I simply see the FSMC_CLK pin toggling.I have several questions that I think will help with my problem:2014-09-10 05:33 AM
So I think I've figured out what needs to happen.
I'm currently using PSRAM type memory with FSMC Bank 1, and the subsection isNOR/PSRAM Bank 1 (basically since I only have access to the NE1 signal on the STM32F4-Discovery I'm using). I've initialised this block, but I'm running into a problem when I make multiple writes to the memory. Currently I do not have any memory attached to STM32F4-Discovery board, but I have the relevant FSMC pins connected to a logic analyser. I can see the FSMC pins change when I configure the GPIO pins, and I can see the CLK pin change when the memory location is written to after configuring the FSMC controller. However, when I make a second write to the ''memory'' (either to another location within the bank, or to the same location) the device seems to ''lock up'' (I lose contact with it in Eclipse). Is there anything that would cause this? Here is the code I'm using:#define SRAM_BANK_ADDR ((uint32_t)0x60000000)
#define BUFFER_SIZE ((uint32_t)0x0100)
#define WRITE_READ_ADDR ((uint32_t)0x0800)
static
void
gpioInit(
void
)
{
GPIO_InitTypeDef GPIO_InitStructure;
//Enable GPIOD and GPIOE clock
__GPIOB_CLK_ENABLE();
__GPIOD_CLK_ENABLE();
__GPIOE_CLK_ENABLE();
//Setup for output pins
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
GPIO_InitStructure.Pull = GPIO_PULLUP;
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
GPIO_InitStructure.Alternate = GPIO_AF12_FSMC;
//Configure PortB pins for us as FSMC output pins
GPIO_InitStructure.Pin = GPIO_PIN_7;
HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
//Configure PortD pins for us as FSMC output pins
GPIO_InitStructure.Pin = GPIO_PIN_0 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_7 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
HAL_GPIO_Init(GPIOD, &GPIO_InitStructure);
//Configure PortE pins for us as FSMC output pins
GPIO_InitStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
HAL_GPIO_Init(GPIOE, &GPIO_InitStructure);
}
static
void
fsmcInit(
void
)
{
SRAM_HandleTypeDef hsram;
FSMC_NORSRAM_TimingTypeDef SRAM_Timing;
//Enable FSMC clock
__FSMC_CLK_ENABLE();
hsram.Instance = FSMC_NORSRAM_DEVICE;
hsram.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
SRAM_Timing.AddressSetupTime = 1;
//Don't care
SRAM_Timing.AddressHoldTime = 1;
//Don't care
SRAM_Timing.DataSetupTime = 1;
//Don't care
SRAM_Timing.BusTurnAroundDuration = 0;
SRAM_Timing.CLKDivision = 2;
//Must be greater than 1
SRAM_Timing.DataLatency = 0;
//Must be '0' for CRAM (PSRAM)
SRAM_Timing.AccessMode = FSMC_ACCESS_MODE_A;
//Not used since we are synchronous
hsram.Init.NSBank = FSMC_NORSRAM_BANK1;
//Use bank 1 since we only have access to the NE1 signal
hsram.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
//Disable multiplex
hsram.Init.MemoryType = FSMC_MEMORY_TYPE_PSRAM;
//PSRAM allowed CLK
hsram.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
hsram.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_ENABLE;
hsram.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
hsram.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
hsram.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
hsram.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
hsram.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
hsram.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
hsram.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
hsram.Init.WriteBurst = FSMC_WRITE_BURST_ENABLE;
//Initialize the SRAM controller
if
(HAL_SRAM_Init(&hsram, &SRAM_Timing, &SRAM_Timing) != HAL_OK)
{
//Initialization Error
Error_Handler();
}
}
int
main(
void
)
{
uint32_t i;
uint32_t uwIndex;
HAL_Init();
//Configure the System clock to have a frequency of 168 MHz
SystemClock_Config();
//Add your application code here
gpioInit();
fsmcInit();
//Infinite loop
while
(1)
{
// Write data to the SRAM memory
for
(uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++)
{
*(__IO uint16_t*) (SRAM_BANK_ADDR + WRITE_READ_ADDR + 2*uwIndex) = aTxBuffer[uwIndex];
}
}
}
2014-09-10 04:24 PM
It appears that there is some fishiness with the FSMC_NWAIT signal.
The errata sheet states that you must:or else the system hangs and no fault is generated.
I haven't tested this, but will check it later tonight.2018-10-22 11:39 PM
Hi @dohzer I can see what problems you are facing and i m facing the exact same problem. I m trying to interface an external FIFO(synchronous) with stm32f767zi (currently using nucleo 144 for checking waveforms on oscilloscope). Did you find any solution for it? There is no examples for synchronous mode of operation in usuer manual , CubeMX or anywhere to refer to.
My code is also similar to what you have shared but waveforms are not coming as per requirement.
2018-10-23 12:56 AM
@ggaut ,
Start a new thread, describing your setup and observed behaviour; read out the relevant FMC registers, check them against RM and and post their content.
JW
2018-10-23 03:23 AM
Ok @Community member I will do that.
2018-11-09 07:33 PM
Sorry for the delay.
I've had a look for the code I was working on, but I don't seem to have it at my fingers.
I believe I did solve the problem I was having, and I think I was configuring it in an incorrect mode, or possibly doing one of the wrong things I mentioned in that last reply, but I can't remember the exact solution.
2018-12-25 09:59 AM
Hello,
Is this issue of synchronous memory solved ?
I also access synchronous memory (fpga).
Thank you,
ran
2019-05-17 10:03 AM
hi
i have same problem,not anything in fsmc_clk
anybody solve this problem?
@Community member @Community member pls help or share some sample code or ioc ,for working with fsmc in synchronized mode ,i try several code but i nothing in fsmc_clk pin
2019-05-17 11:37 AM
Sorry, don't have the resources to work on this.