2024-08-19 01:11 AM - edited 2024-08-19 08:49 PM
Good Day and Hello Everyone.
In my upcoming project, my task is to upgrade the currently used MCU from STM32F103ZG to STM32H755ZI.
My question are;
1- Can I replace all the FSMC I/O pins that I'm currently using on STM32F103ZG with the FMC I/O pins on STM32H755ZI?
2- If not, are there any other option for me to find a replacement for FMSC I/O pin that I'm currently used on STM32F103ZG to other pins on STM32H755ZI?
3- Can I replace all the FSMC_NOE, FSMC_NWE and FMSC_NWAIT pins that I'm currently using on STM32F103ZG with the FMC_NOE, FMC_NWE and FMC_NWAIT I/O pins on STM32H755ZI?
Thank you in advance for all your advice, opinion and tips. Any answer are highly appreciated.
Solved! Go to Solution.
2024-08-20 01:39 AM - edited 2024-08-20 01:40 AM
Hello and thank you for the clarification.
From pinout standpoint, except the SDRAM function, indeed they are almost the same. So you can use FMC (Flexible Memory Controller) instead of FSMC (Flexible Static Memory Controller). But this is not the challenging point here. The most challenging part is the fact that STM32H755 has more complex architecture than STM32F103. H755 is a dual core architecture (CM7 and CM4). Moving from Cortex-M3 programming to Cortex-M7 is not a small task taking into account the cache usage (cache policies), the usage of the MPU, and the speculative behavior of the core.
So as you are planning to control a Motor Controller IC, as first advice, I suggest you to configure the memory region of that device as Device or Strongly-Ordered using MPU.
I advice you to read these documents/articles:
AN5557 STM32H745/755 and STM32H747/757 lines dual-core architecture
AN4891 STM32H72x, STM32H73x, and single-core STM32H74x/75x system architecture and performance
AN4839 Level 1 cache on STM32F7 Series and STM32H7 Series
AN4838 Introduction to memory protection unit management on STM32 MCUs
AN5617 STM32H745/755 and STM32H747/757 lines inter-processor communications
PM0253 STM32F7 Series and STM32H7 Series Cortex®-M7 processor programming manual
Articles:
STM32H7 Dual-Core: How to communicate between CM4 & CM7?
STM32H7 configuration tips and tricks
Threads
Speculative access and STM32H7 Memory Protection Unit
Hope it helps.
2024-08-19 01:18 AM
Hello @mdfsl and welcome to the community.
What do you mean by " Can I replace all the FSMC I/O pins that I'm currently using on STM32F103X6 with the FMC I/O pins on STM32H755ZG?"
You need to give more details on your case and what do you plan to do..
2024-08-19 01:21 AM
Hello @mdfsl
STM32H755ZG Does not exist. Could you please correct this.
Best Regards.
STTwo-32
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2024-08-19 06:43 PM
Hello @STTwo-32 very sorry for the mistake. The actual part number is STM32H755ZI
2024-08-19 07:35 PM
Hi @SofLit , thanks for your reply.
On our current product, we are using FSMC_A[4:1], FSMC_D[15:0], FSMC_NOE, FSMC_NWE and FMSC_NWAIT I/Os (total of 23 pins) on STM32F103ZG to communicate with an external Motor Controller IC. On our next project, due to a new technical requirement, we will need to change from using STM32F103ZG to STM32H755ZI. The STM32H755ZI MCU does not have any FSMC I/Os but it does have FMC I/O and I've checked the datasheet for both MCU and it seems that they are huge similarities between FSMC and FMC I/Os.
I've asked the Firmware team regarding this matter and according to them, if the I/O structure and architecture for both MCU are the same, I can use the FMC I/Os on STM32H755ZI to replace the FSMC I/Os on STM32F103ZG with minor changes on the Firmware.
Therefore, I would like to get a confirmation from STM technical teams or any other experts that is familiar with these MCUs about using the FMC I/Os on STM32H755ZI to replace the FSMC I/Os on STM32F103ZG.
2024-08-20 01:39 AM - edited 2024-08-20 01:40 AM
Hello and thank you for the clarification.
From pinout standpoint, except the SDRAM function, indeed they are almost the same. So you can use FMC (Flexible Memory Controller) instead of FSMC (Flexible Static Memory Controller). But this is not the challenging point here. The most challenging part is the fact that STM32H755 has more complex architecture than STM32F103. H755 is a dual core architecture (CM7 and CM4). Moving from Cortex-M3 programming to Cortex-M7 is not a small task taking into account the cache usage (cache policies), the usage of the MPU, and the speculative behavior of the core.
So as you are planning to control a Motor Controller IC, as first advice, I suggest you to configure the memory region of that device as Device or Strongly-Ordered using MPU.
I advice you to read these documents/articles:
AN5557 STM32H745/755 and STM32H747/757 lines dual-core architecture
AN4891 STM32H72x, STM32H73x, and single-core STM32H74x/75x system architecture and performance
AN4839 Level 1 cache on STM32F7 Series and STM32H7 Series
AN4838 Introduction to memory protection unit management on STM32 MCUs
AN5617 STM32H745/755 and STM32H747/757 lines inter-processor communications
PM0253 STM32F7 Series and STM32H7 Series Cortex®-M7 processor programming manual
Articles:
STM32H7 Dual-Core: How to communicate between CM4 & CM7?
STM32H7 configuration tips and tricks
Threads
Speculative access and STM32H7 Memory Protection Unit
Hope it helps.