on
2021-07-26
03:10 AM
- edited on
2024-09-06
07:27 AM
by
Laurids_PETERSE
This FAQ responds to the inquiry related to the dual core communication on STM32H7, CM4 & CM7.
STM32H745/755 and STM32H747/757 are double cored products that support Arm Cortex-M7 core and Arm Cortex-M 4 core. The M7 operates up to 480MHz and the M4 operates up to 240MHz.
A dual-core device is very flexible and designed with a significant performance boost, as dual-core processors can divide information for processing by multiple units that comes from the incorporation of the two cores.
To ensure the communication between the two cores, many solutions can be implemented with STM32H7:
The synchronization with other processors is allowed by semaphores and interrupts.
Some examples are provided within the cube package under the path: “\Repository\STM32Cube_FW_H7\Projects\STM32H745I-DISCO\Examples\HSEM (HSEM_ResourceSharing, HSEM_CoreSync, HSEM_CoreNotification".
The Inter-processors communication (IPC) mechanism is used by different processors to communicate or exchange data.
This mechanism allows message passing by sending and receiving messages from other processor and using a common memory area with other processors.
The FreeRTOS example shows how to use embedded hardware semaphore to send notification between the two cores.
The cube package example can also be found under the local path: “\Repository\STM32Cube_FW_H7\Projects\STM32H747I-EVAL\Applications”.
You can refer to the 4.2 section of the AN5617: "FreeRTOS message buffer".
OpenAMP is a framework that provides the required software components to enable the development of applications for asymmetric multi-processing (AMP) systems.
It provides Life Cycle Management and Inter-Processor Communication capabilities for management of remote compute resources and their associated software contexts. Also, it standardizes the interactions between operating environments in a heterogeneous embedded system through open-source components such as RemoteProc and RPMsg).
Mainly there are two steps to send a message from CPU1 to CPU2 via OpenAMP here are the steps:
- CPU1 that represents the master core sending data, allocates buffers from the shared memory used for transmission, writes RPMsg header and data payload to it.
- Then, it enqueues the buffers in the ring buffer to make it available for CPU2.
RPMsg (remote processor messaging) is a protocol providing the messaging infrastructure between cores as component of the OpenAMP framework. It allows inter-processor communication between applications running on different CPUs.
Several communication examples are available within the GitHub STMicroelectronics STM32CubeH7 library .
- Two examples of the OpenAMP framework are present under the GitHub path showing how to use it to create a communication channel between cores and send mutual messages in the two directions.
- The cube package examples can also be found under the local path: “\Repository\STM32Cube_FW_H7_V1.9.0\Projects\STM32H747I-EVAL\Applications”.
You can refer to the 4.1 section of the AN5617: "OpenAMP".
Question: can a dual core ARM also help with maintaining some semblance of "redundancy" in being compliant with Safety integrity level (SIL) applications?
I'm really interested in exploring this more. Thanks