2015-04-07 10:24 AM
What transfer rate (read and write) can be expected for an FSMC interface to NAND flash, 8 bit data path, DMA, STM32F4xx at either 48 or 168MHz? Is it heavily influenced by choice of NAND flash chip vendor/part?
2015-04-07 01:22 PM
The FSMC is merely a conduit to the data buffers on the device, the speed at which it can fetch blocks, erase and write them will depend on the Flash architecture and geometry. The higher density memory is inherently less reliable and has more complicated/robust error correction schemes. The newer devices having built-in ECC syndrome generation/checking hardware, with correction performed by software on the host. Probably won't need the STM32's ECC generation/checking.