For I2C master transmission, what is the difference between TXIS interrupt and TXE interrupt?

[FWu1]

The I2C ISR register has both TXIS and TXE bit. They are both set when TXDR is empty, and cleared when new data written to TXDR. What is the difference between this 2? Is there any reason I should be using one of them but not the other for master transmission?

[Tesla DeLorean]

STM32 covers hundreds of parts over dozens of families, please be specific.

I think TXIS is one that actually generates an interrupt, so perhaps a latched or gated version of TXE

Review source code examples including libraries to get a feel for use/application.

For commercial projects contact your local sales/support office and discuss with an FAE.