2019-08-21 10:41 PM
Hi,
i am currently analyzing the FIR filter example project.
Our DSP processor supports only integer numbers. Floating point arithmetic will not be supported.
"The SoftFloat library from John Hausser is used to emulate floating point operations
on a fixed point processor (www.jhauser.us/arithmetic/SoftFloat.htm). This library is only used in combination with the CHESS front end."
As I checked the example FIR implementation the cycle add function will be realized with fmadds. The assembly command fmadds dealing with two floating point number.
(cyclic_add function is provided by DSP-L /
ST. void* cyclic_add(T* p, int offs, T* start, int len)).
The example code is dealing with floating numbers and the floating point calculation will be emulated.
Why convert the compiler the cyclic add function to a floating point assembly command?
(See attached file.)
2019-08-22 01:56 AM
Hi @Roland Dorn
In order your post reach the right people could you please clarify which STM32 chip you are using ?
Thx
Olivier
2019-08-22 02:05 AM
At first glance, the assembly doesn't look like Thumb-II (Cortex M).
2019-08-22 02:07 AM
Hi Olivier,
it is about the STxP6016 integrated into (ST28) SR6P7x.
2019-08-22 04:15 AM
We have notified our dedicated staff in Stuttgart/Munich who will respond to you asap.
cc: @Marian GORTOL , @Carsten SBICK , @Robert BOCK
2019-09-16 11:53 PM
I am still waiting for an answer.