FLASH access speed versus SRAM ...

[rmalhotra9]

Posted on January 07, 2010 at 21:14

FLASH access speed versus SRAM ...

[armmcu]

Posted on May 17, 2011 at 13:37

Hi,

I invite you to see these discussions:

http://www.st.com/mcu/forums-cat-9179-23.html

http://www.st.com/mcu/forums-cat-6471-23.html

Cheers, armcu.

[rmalhotra9]

Posted on May 17, 2011 at 13:37

Hi,

Can anyone in the forum guide me to the access speed for the on board FLASH of the STM32F103RBT6 device? Also has anyone done any benchmarking for the interrupt latency time for the following cases: 1. Interrupt Handler is resident in FLASH 2. Interrupt Handler is resident in the SRAM From the datasheet I understand that the SRAM is running at 0 wait states -> 72 MHZ. I have not been able to locate a similar figure for the onboard FLASH. Thanks -rsm

[rmalhotra9]

Posted on May 17, 2011 at 13:37

thanks armmcu ....

the links are very useful. regards, -rsm

[JLitt]

Would it be possible to get updated links to the discussions posted here? They return broken links.

Thanks!

[Tesla DeLorean]

You are dealing with threads from 8 years ago, and multiple forum transitions.

Figure on F1 series FLASH access takes about 35ns, in however many clock cycles that eats at your clocking frequency, where as RAM will take 1 cycle. Tip: don't buy the 12 year old design.

Newer STM32 series have hardware to mask the slowness, the F2/F4 have 128-bit with cache lines in the ART, the first takes a hit, but the prefetch path provides data within the current cycle, so effectively a 0-cycle transaction vs 1-cycle on RAM, so in fact faster or about the same, depending on if you got a cache hit/miss.

F0/L0 figure you'll get a serious hit if you introduce a FLASH wait state. So a part clocking at 24 MHz with 0 wait states will out perform one a 25 MHz with 1 wait state

[JLitt]

Thank you!