2016-03-30 12:03 AM
I'm working with timer1 in PWM input mode and trying to add a filter to remove input spikes. The document refers to a signal called Fdts when configuring the capture filter. I can't find the source / frequency of the Fdts signal. Does anyone know where it is described?
Best regardsTajs2016-03-30 12:24 AM
I would look at the timebase of the timer and the clock division parameter that controls the clock into the filter.
The input capture prescaler controls how many events it responds to.2016-03-30 02:36 AM
fDTS is the common clock for all digital filters in the timer (all TI signals and ETR) and the dead-time generators in the advanced timers' output section. It is generated by a divider from the timer's internal clock CK_INT, i.e. the clock coming from RCC. See CKD field in TIMx_CR1 (fDTS is of course inverse of tDTS). Search for ''DTS'' in the RM.
JW