2015-02-27 03:17 PM
I am having problems with the SDIO interface on STM32L1 series of processors.
The SDIO option is available on the STM32L152D-EVAL, but the price of this board is rather high, so I am working with a modified Nucleo board. The SDIO option is not available on the Nucleo board (Nucleo-L152RE), however, I replaced the stock STM32L152RE with STM32L151RD which has an SDIO. I wired the SD card the same way as it is wired in L152D-EVAL, modified the sample IAR project with FatFS example for STM32L152D-EVAL to change the target (the project is attached) and ran the code.The interface “sort of�? works. My code will attempt 10000 writes, each 512 bytes, to the card, but will crash anywhere between 1 and 5000 writes. It always crashes with error code FR_DISK_ERR that is thrown by ABORT in fs_write:
#if _FS_TINY
if (fp->fptr >= fp->fsize) {
/* Avoid silly cache filling at growing edge */ if (sync_window(fp->fs)) ABORT(fp->fs, FR_DISK_ERR); fp->fs->winsect = sect;
}
#else
if (fp->dsect != sect) {
/* Fill sector cache with file data */
if (fp->fptr < fp->fsize &&disk_read(fp->fs->drv, fp->buf.d8, sect, 1))
ABORT(fp->fs, FR_DISK_ERR);
}
#endif
The results is that the file is created and will have several lines written, but never the full 10000 lines.
In addition, 4-bit SDIO refuses to work on any card (tried 5 different cards 1Gb – 8Gb). To see if my soldering skills are to blame, I made another L151RD board and the behavior is identical. Any pointers on getting the SDIO to work properly, complete the writes and work with the 4-bit interface? Am I missing something obvious?
2015-02-27 04:56 PM
Well not much in common (HAL, IAR, L15x, Nucleo), perhaps I can build toward you from a different direction and see if we meet in the middle?
Ok, so what pins are you using? And how is your socket wired up? Looks to be a full size SD card socket. USART output via PA2/PA3 ?2015-02-28 08:29 AM
Thank you!
The socket is a full SD socket, but I am using microSD cards through an adapter. The cards are Transcend, SanDisk, Edge. The wiring is identical to the circuit on 152D-EVAL, and I believe this is the standard wiring for SDIO on all STM32 processors (below). I am not using USART, but these pins are available and connect to Nucleo's RX/TX. Surprisingly, the stock code example provided for the L152D runs fine, but all it does is writes a very short file and then reads it back. That code completes every time I tried it. The problems arise when writing large files as shown in the project attached to the previous post. That code fails every single time and I am left with a partial file. The run time after opening of the file and before failure varies from milliseconds (almost instant) to 5-10seconds, where 1-2Mb get written before failure.2015-03-02 11:56 AM
Looks like I have the STM32L152-EVAL, not the STM32L152D-EVAL
Nevertheless I have ported the L1 SDIO code to the NUCLEO151D. Attached is a .HEX of a blind port, progress output should come out of USART2 at 115200 8N1, which is accessible via the Virtual COM port of the ST-LINK. Should do a directory and read/write test against media 128MB - 32GB ________________ Attachments : NUCLEO151RDSDIO_REL1.hex : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I016&d=%2Fa%2F0X0000000bSD%2FK2PRL6jk3sjTjHcPdFyKUsbC.9TFUx.bS8AZY.Mv1vk&asPdf=false2015-03-02 03:21 PM
Thank you, Clive!
The code works really well (though the terminal should be set at 57600). I tested it with 4 different cards, and all show pretty good results. What is the secret? ;) Can you share the code that does this?8Gb SDHC Sandisk[00]FatFs Testing for Nucelo L152 SDIO - STM32 Forum Done SYS:32000000, H:32000000, P1:32000000, P2:32000000 CPU:32000000 CRC32 299CAE58 Memory Image 32768000 Bytes, 346056392 Cycles 3.030073 MBps Write (FatFs) CRC32 299CAE58 SPEEDTST.BIN 32768000 Bytes, 361270535 Cycles 2.902468 MBps Write (FatFs) CRC32 299CAE58 SPEEDTST.BIN 32768000 Bytes, 177501582 Cycles 5.907418 MBps Read (FatFs) 32768000 Bytes, 177499188 Cycles 5.907497 MBps Read (FatFs)8Gb SDHC Kingston
[00]FatFs Testing for Nucelo L152 SDIO - STM32 Forum Done SYS:32000000, H:32000000, P1:32000000, P2:32000000 CPU:32000000 CRC32 CDE72BA6 Memory Image 32768000 Bytes, 580823675 Cycles 1.805326 MBps Write (FatFs) CRC32 CDE72BA6 SPEEDTST.BIN 32768000 Bytes, 612717573 Cycles 1.711353 MBps Write (FatFs) CRC32 CDE72BA6 SPEEDTST.BIN 32768000 Bytes, 192607749 Cycles 5.444101 MBps Read (FatFs) 32768000 Bytes, 192710360 Cycles 5.441202 MBps Read (FatFs)4Gb SDHC SanDisk
[00]FatFs Testing for Nucelo L152 SDIO - STM32 Forum Done SYS:32000000, H:32000000, P1:32000000, P2:32000000 CPU:32000000 CRC32 5BA16CA7 Memory Image 32768000 Bytes, 231172401 Cycles 4.535905 MBps Write (FatFs) CRC32 5BA16CA7 SPEEDTST.BIN 32768000 Bytes, 252001765 Cycles 4.160987 MBps Write (FatFs) CRC32 5BA16CA7 SPEEDTST.BIN 32768000 Bytes, 142322389 Cycles 7.367611 MBps Read (FatFs) 32768000 Bytes, 142320813 Cycles 7.367693 MBps Read (FatFs)1Gb Edge
[00]FatFs Testing for Nucelo L152 SDIO - STM32 Forum Done SYS:32000000, H:32000000, P1:32000000, P2:32000000 CPU:32000000 CRC32 08ECBCF7 Memory Image 32768000 Bytes, 204940493 Cycles 5.116490 MBps Write (FatFs) CRC32 08ECBCF7 SPEEDTST.BIN 32768000 Bytes, 205034063 Cycles 5.114155 MBps Write (FatFs) CRC32 08ECBCF7 SPEEDTST.BIN 32768000 Bytes, 143421953 Cycles 7.311126 MBps Read (FatFs) 32768000 Bytes, 143421594 Cycles 7.311145 MBps Read (FatFs)
2015-03-02 04:17 PM
What is the secret? ;) Can you share the code that does this?
One of the main ones is not using HAL, I can create a clean project (Keil) with the core SDIO/FATFS functionality, the validation/metrics stuff not so much. I'm using an older FatFs release, but that's more for convenience than any thing else.2015-03-02 05:37 PM
That would be great! Will you post it here or need an email?
2015-03-02 06:03 PM
I'll post it up here some time tomorrow, while your board is rather unique, having a solid working example of FAT+SDIO for the L1 has fairly broad appeal.
Might construct a GNU/GCC example too if you're game to test that. Are you planning on building a ''shield'', or an L151 board? Or just experimenting?2015-03-03 06:34 AM
I'd be happy to test a GCC example in addition to Keil. As a matter of fact I was trying to experiment with Coo Cox as a free alternative to IAR, specially that it sometimes (though rarely) succeeds in importing Keil projects.
Would you mind also leaving UART functionality in the project? All of my code is implemented following HAL examples and to add UART to the SDIO, I'd have to ''deHAL'' the code. I am building a custom, STM32-based sensor that needs to log the data on an SD card. Benchmarking SD cards via SPI on L053R8 showed about 50Kb/s sustained write rate in 512 byte chunks. That prompted a move to investigate L1 series to take advantage of SDIO hardware. My intent is to keep the SD card in low-power state most of the time (by removing the clock) and dump 2-4Kb chunks of data on the card every 3-5 seconds. Hopefully, a higher write rate of SDIO will result in less power consumption, as the wake time will be less than with SPI.2015-03-04 01:38 PM
https://drive.google.com/file/d/0B7OY5pub_GfIZVcxbERXclIydDQ/view?usp=sharing