2026-04-14 7:35 AM - last edited on 2026-04-14 10:21 AM by Andrew Neil
Hi,
On the stm32c5 nucleo board (NUCLEO-C5A3ZG) there is T1S OA PMD driver (not mounted?). In the header file
"stm32c593xx.h" exists a 10BASE-T1S control register "MAC10BT1SCR".
But there is no documentation in the Reference Manual RM0522 Rev 1, and I can't find a way to enable T1S on MXcube2.
Can anyone help me here? Is the T1S PDM really integrated in the C5 series?
I would really like to experiment with 10Base T1S.
Regards
Patrick
Solved! Go to Solution.
2026-04-14 12:51 PM
Issue internally confirmed. No T1S support on STM32C5.
All T1S mentions will be removed from the STM32C5 package.
Thank you for your contribution.
2026-04-14 7:46 AM
@infoinfo982 wrote:I would really like to experiment with 10Base T1S.
Me too!
2026-04-14 9:00 AM - edited 2026-04-14 9:23 AM
Hello,
Since there is no indication in the documentation the product supports the T1S, it doesn't support it. I will escalate it internally to double check. Internal ticket for follow-up CDM0061715 (not accessible by the community users).
For the T1S PHY footprint on the board it may be used for another product.
2026-04-14 10:02 AM - edited 2026-04-14 10:20 AM
Quick googling shows that 10BASE-T1S specifies only the PHY. So the MAC of STM32C5 should work with any compatible PHY. Why does it have the 10BASE-T1S control register "MAC10BT1SCR" ?
DS15137 has no notion of 10BASE-T1S in ETH section.
2026-04-14 10:24 AM
@infoinfo982 wrote:In the header file "stm32c593xx.h" exists a 10BASE-T1S control register "MAC10BT1SCR".
Please show that section of that file.
2026-04-14 11:28 AM
2026-04-14 12:51 PM
Issue internally confirmed. No T1S support on STM32C5.
All T1S mentions will be removed from the STM32C5 package.
Thank you for your contribution.